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AN213924 Datasheet(PDF) 25 Page - Infineon Technologies AG |
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AN213924 Datasheet(HTML) 25 Page - Infineon Technologies AG |
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25 / 74 page ![]() Document Number: 002-30703 Rev. *F Page 24 of 73 PSoC 6 MCU: CY8C61x5 Datasheet Figure 10. Device Pinout for 68-QFN Package[1] Note: If the USB pins are not used, connect VDDUSB to ground and leave the P14.0/USBDP and P14.1/USBDM pins unconnected. Note 1. The center pad on the QFN package should be connected to PCB ground relative to device VDDx for best mechanical, thermal, and electrical performance. For more information, see AN72845, Design Guidelines for QFN Devices. VBACKUP P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 XRES VDD_NS VIND1 VDDUSB P14.1 / USBDM P14.0 / USBDP P2.0 P2.1 P2.2 P2.3 P10.1 P10.0 VREF VDDA P9.3 P9.2 P9.1 P9.0 P8.1 P8.0 P7.7 P7.3 P7.2 P7.1 P7.0 VDDIOA VDDIO1 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 10 11 12 13 14 15 16 17 1 2 3 4 5 6 7 8 9 QFN (TOP VIEW) |
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