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SST25VF020B Datasheet(PDF) 4 Page - Microchip Technology |
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SST25VF020B Datasheet(HTML) 4 Page - Microchip Technology |
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4 / 33 page ![]() 2012-2020 Microchip Technology Inc. DS20005054D-page 4 SST25VF020B 2.0 PIN DESCRIPTION FIGURE 2-1: PIN DESCRIPTIONS 1 2 3 4 8 7 6 5 CE# SO WP# V SS V DD HOLD# SCK SI Top View Pin Assignment for 8-Lead SOIC Top View 1 2 3 4 8 7 6 5 CE# SO WP# V SS Top View V DD HOLD# SCK SI Pin Assignment for 8-Contact USON 8 7 6 5 1 2 3 4 CE# SO WP# V SS V DD HOLD# SCK SI Pin Assignment for 8-Contact WSON TABLE 2-1: PIN DESCRIPTION Symbol Pin Name Functions CE# Chip Enable The device is enabled by a high-to-low transition on CE#. CE# must remain low for the duration of any command sequence. SO Serial Data Output Transfer data serially out of the device. Data is shifted out on the falling edge of the serial clock. Outputs Flash busy status during AAI Programming when reconfigured as RY/BY# pin. See Section 5.5 “End-of-Write Detection” for details. WP# Write-Protect The Write-Protect (WP#) pin is used to enable/disable BPL bit in the STATUS register. SI Serial Data Input Transfer commands, addresses or data serially into the device. Inputs are latched on the rising edge of the serial clock. SCK Serial Clock Provide the timing of the serial interface. Commands, addresses or input data are latched on the rising edge of the input, while output data is shifted out on the falling edge of the clock input. HOLD# Hold Temporarily stop serial communication with SPI Flash memory without reset- ting the device. VDD Power Supply Provide power supply voltage: 2.7V-3.6V. VSS Ground |
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