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TLE7272D Datasheet(PDF) 3 Page - Infineon Technologies AG |
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TLE7272D Datasheet(HTML) 3 Page - Infineon Technologies AG |
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3 / 20 page ![]() AEP02825_7272 RO INH Q I GND GND RO Ι IEP02528 INH Q TLE 7272 Data Sheet 3 Rev. 1.0a, 2005-02-08 Figure 2 Pin Configuration P-TO252-5 (D-PAK), P-TO263-5 (D 2-PAK)(top view) Table 1 Pin Definitions and Functions Pin No. Symbol Function 1 I Input; block to ground directly at the IC with a ceramic capacitor. 2 RO Reset Output; Open Collector Output with integrated pull-up resistor of typically 30k Ω. Optional external pull-up resistor of ≥ 10 kΩ to pin Q. 3 GND Ground; Pin 3 internally connected to heatsink. 4 INH Inhibit Input; low level disables the IC. Integrated pull-down resistor. 5 Q Output; block to ground with a ceramic capacitor, C ≥ 470 nF. |
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