ADC9708 datasheet(3/8 Pages) NSC

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Electrical Characteristics

Over recommended operating conditions VCC e 50V b55 C s TA s a125 C for ADC9708CMJ and 0 C s TA s a70 C for

ADC9708CCJ or ADC9708CCN unless otherwise specified (Continued)

Symbol

Parameter

Conditions

Typical

Limit

Units

(Note 10)

(Note 11)

(Limit)

ICC

Power Supply Current

VCC e 5V to 15V I0 e 0

mA (max)

CIN

Input Capacitance

COUT

Comparator Output Capacitance

Note 1

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is

intended to be functional These ratings do not guarantee specific performance limits however For guaranteed specifications and test conditions see the

Electrical Characteristics The guaranteed specifications apply only for the test conditions listed Some performance characteristics may degrade when the device

is not operated under the listed test conditions

Note 2

All voltages are measured with respect to GND unless otherwise specified

Note 3

VREF should not exceed VCC b 2V

Note 4

Conversion accuracy is defined as the deviations from a straight line drawn between the points defined by channel address 000 (0 scale) and channel

address 111 (full scale) for all channels

Note 5

Linearity is defined as the deviation from a straight line drawn between the 0 and full scale points for each channel

Note 6

Power supply rejection ratio is defined as the conversion error contributed by power supply voltage variations while resolving mid scale on any channel

Note 7

Cross Talk between channels e 20 log

VCH

Note 8

Caution should be taken not to exceed absolute maximum power rating when the device is operating in a severe fault condition (ex when any inputs or

outputs exceed the power supply) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction

temperature) iJA (package junction to ambient thermal resistance) and TA (ambient temperature) The maximum allowable power dissipation at any temperature

is PDmax e (TJmax b TA) iJA or the number given in the Absolute Maximum Ratings whichever is lower For this device TJmax e 150 C and the typical thermal

resistance (iJA) for board mounting follow

ADC9708CCN

62 CW

ADC9708CCJ ADC9708CMJ

58 CW

Note 9

Human body model 100 pF discharged through a 15 kX resistor

Timing Diagram

TLH10409 – 7

FIGURE 1 Equivalent Timing Waveform for

Test Circuits and Applications

Note 10

Typicals are at a25 C and represent most likely parametric norm

Note 11

Tested limits are guaranteed to National’s AOQL (Average Outgo-

ing Quality Level)

Test Circuits

Input Timing

TLH10409 – 8

tA l 400 ms

VREF e

33kX

2kX a 33 kX

J 5Ve31

IR e

5 b 31

100 kX

19 mA

max

full scale ramp time

001 c 10b6

19 c 10b6

31 e 16 ms

Note

For evaluation purposesthe ramp start timing generation can be im-

plemented with an LM555 timer (astable operation) or MPU evaluation kit

and a time interval meter for ramp time measurement The TIM meter will

measure the time between to 0 to 1 transition of the ramp start and the 1 to

0 transition of the ramp stop The ramp stop is open collector and must

have an external pull-up resistor to VCC

FIGURE 2 Slow Speed Evaluation Circuit

for Ratiometric Operation

ADC9708 Datasheet(PDF) 3 Page - National Semiconductor (TI)

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