AM69AX datasheet(7/299 Pages) TI

7 / 299 page

Table 5-1. Device Comparison (continued)

FEATURES(7)

REFERENCE NAME

AM69A9

AM69A7

Capture Subsystem with Camera Serial Interface

(CSI2)

CSI2.0 4L RX

CSI2.0 4L TX

Multichannel Serial Peripheral Interface

MCSPI

Multichannel Audio Serial Port

MCASP0

16 Serializers

MCASP1

5 Serializers

MCASP2

5 Serializers

MCASP3

3 Serializers

MCASP4

5 Serializers

MultiMedia Card/ Secure Digital Interface

MMCSD0

eMMC (8-bits)

MMCSD1

SD/SDIO (4-bits)

Universal Flash Storage

UFS 2L

Flash Subsystem (FSS)

OSPI0

8-bits(6)

OSPI1(8)

4-bits

HyperBus

Yes(6)

4x PCI Express Port with Integrated PHY

PCIE

2x4L or 4x2L(4)

Hyperlink

HYP

No(9)

Ethernet Interfaces

MCU CPSW2G

RMII or RGMII(5)

MAIN CPSW2G

RMII or RGMII(5)

CPSW9G

8 port SERDES(4)

General-Purpose Timers

TIMER

Enhanced High Resolution Pulse-Width Modulator

Module

eHRPWM

Enhanced Capture Module

eCAP

Enhanced Quadrature Encoder Pulse Module

eQEP

Universal Asynchronous Receiver and Transmitter

UART

Universal Serial Bus (USB3.1) SuperSpeed Dual-

Role-Device (DRD) Ports with SS PHY

USB0

Yes(4)

(1)

Functional Safety is not supported on this device family, if interested in this feature, please see the TDA4VH device family.

(2)

Device security features including Secure Boot and Customer Programmable Keys are applicable to select part number variants as

indicated by the Device Type (Y) identifier in the Table 10-1, Nomenclature Description table

(3)

AEC-Q100 qualification is applicable to select part number variants as indicated by the Automotive Designator (Q1) identifier in the

Device Naming Convention table

(4)

DP, SGMII, USB3.0, and PCIE share total of 16 SerDes lanes.

(5)

AM69A CPSW supports up to 8 ports using the following instances and signals and modes of operation:

•

PORT1 Signals: SGMII1, Modes: One of 5Gb, 10Gb USXGMII/XFI, 2.5 Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII

•

PORT2 Signals: SGMII2, Modes: One of 5Gb, 10Gb USXGMII/XFI, 2.5 Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII

•

PORTn (n=3 thru 8) Signals: SGMIIn, Modes: One of 2.5 Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII

If QSGMII is used on any SGMII Port 1 thru 4, then SGMII1/2/3/4 cannot be used for Ethernet functionality since all 4 internal CPSW

ports map to the selected QSGMII SERDES port.

If QSGMII is used on any SGMII Port 5 thru 8, then SGMII5/6/7/8 cannot be used for Ethernet functionality since all 4 internal CPSW

ports map to the selected QSGMII SERDES port.

(6)

Two simultaneous flash interfaces configured as OSPI0 and OSPI1, or HyperBus and OSPI1.

(7)

J784S4 is the base part number for the superset device. Software should constrain the features used to match the intended production

device.

(8)

OSPI1 module only pins out 4 pins and is referred to as QSPI in some contexts.

(9)

Hyperlink is not supported on this SoC. System designs should not use the signals HYP_*, HYP0_*, HYP1_*.

(10) MCU_R5FSS0 includes Dual-Core R5F that provides Device Management functionality, and is reserved for executing TI provided

code.

R5FSS1 is a Dual-Core R5F that provides Multimedia Control functionality, and is reserved for executing TI provided code.

(11) The Deep Learning Accelerator C7x + MMA are reserved for executing TI provided code, and are not available for custom code.

www.ti.com

AM69A

SPRSP92 – FEBRUARY 2023

Submit Document Feedback

Product Folder Links: AM69A

AM69AX Datasheet(PDF) 7 Page - Texas Instruments

AM69AX Datasheet(HTML) 7 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL