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VSC8530-05 Datasheet(PDF) 45 Page - Microsemi Corporation

Part # VSC8530-05
Description  Single Port Industrial Grade Fast Ethernet Copper PHY with RGMII/RMII Interfaces
PDF  80 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC8530-05 Datasheet(HTML) 45 Page - Microsemi Corporation

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Registers
VMDS-10516 VSC8530-05 Datasheet Revision 4.1
38
4.3
Extended Page 1 Registers
To access the extended page 1 registers (17E1–30E1), enable extended register access by writing
0x0001 to register 31. Writing 0x0000 to register 31 restores the main register access.
When extended page 1 register access is enabled, reads and writes to registers 16–30 affect the
extended registers 17E1–30E1 instead of those same registers in the IEEE-specified register space.
Registers 0–15 are not affected by the state of the extended page register access.
4.3.1
Cu Media CRC Good Counter
Register 18E1 makes it possible to read the contents of the CRC good counter for packets that are
received on the Cu media interface: the number of CRC routines that have executed successfully. The
following table shows the expected readouts.
4.3.2
Extended Mode Control
Register 19E1 controls the extended LED and other chip modes. The following table shows the settings
available.
Table 44 •
Extended Registers Page 1 Space
Address
Name
17E1
Reserved
18E1
Cu Media CRC Good Counter
19E1
Extended Mode Control
20E1
Extended PHY Control 3 (ActiPHY)
21E1–22E1 Reserved
23E1
Extended PHY Control 4 (PoE and CRC Error Counter)
27E1–28E1 Reserved
29E1
Ethernet Packet Generator (EPG) 1
30E1
EPG 2
Table 45 •
Cu Media CRC Good Counter, Address 18E1 (0x12)
Bit
Name
Access Description
Default
15
Packet since last read
RO
Self-clearing bit.
1: Packet received since last read.
0
14
Reserved
RO
Reserved.
13:0 Cu Media CRC good
counter contents
RO
Self-clearing bit. Counter containing the number of packets
with valid CRCs modulo 10,000; this counter does not saturate
and will roll over to zero on the next good packet received after
9,999.
0x0000
Table 46 •
Extended Mode Control, Address 19E1 (0x13)
Bit
Name
Access Description
Default
15:14 Reserved
RO
Reserved.
13
LED1 Extended Mode
R/W
Sticky bit.
1: See Basic Serial LED Mode, page 18.
0
12
LED0 Extended Mode
R/W
Sticky bit.
1: See Basic Serial LED Mode, page 18.
0



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