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831724 Datasheet(PDF) 15 Page - Renesas Technology Corp |
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831724 Datasheet(HTML) 15 Page - Renesas Technology Corp |
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15 / 23 page  15 ©2016 Integrated Device Technology, Inc Revision B November 16, 2016 831724 Datasheet Differential Clock Input Interface The CLK /nCLK accepts LVDS, LVPECL, HCSL, and other differential signals. Both differential inputs must meet the VPP and VCMR input requirements. Figures 2A to 2D show interface examples for the CLK/nCLK input driven by the most common driver types. The input interfaces suggested here are examples only. Please consult with the vendor of the driver component to confirm the driver termination requirements. For example, in Figure 2A, the input termination applies for IDT LVPECL drivers. If you are using an LVPECL driver from another vendor, use their termination recommendation. Figure 2A. CLK/nCLK Input Driven by a 3.3V LVPECL Driver Figure 2C. CLK/nCLK Input Driven by a 3.3V LVDS Driver Figure 2B. CLK/nCLK Input Driven by a 3.3V LVPECL Driver Figure 2D. CLK/nCLK Input Driven by a 3.3V HCSL Driver HCSL *R3 *R4 CLK nCLK 3.3V 3.3V Differential Input |
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