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8304AMILF Datasheet(PDF) 4 Page - Renesas Technology Corp |
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8304AMILF Datasheet(HTML) 4 Page - Renesas Technology Corp |
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4 / 12 page ![]() 8304I Data Sheet ©2015 Integrated Device Technology, Inc December 10, 2015 4 TABLE 3D. LVCMOS / LVTTL DC CHARACTERISTICS, V DD = 3.3V±5%, V DDO = 2.5V±5%, TA = -40°C TO 85°C TABLE 4A. AC CHARACTERISTICS, V DD = V DDO = 3.3V±5%, TA = -40°C TO 85°C Symbol Parameter Test Conditions Minimum Typical Maximum Units f MAX Output Frequency 166 MHz tp LH Propagation Delay, Low-to-High; NOTE 1 ƒ ≤ 166MHz 2 3.3 ns tjit Buffer Additive Phase Jitter, RMS; refer to Additive Phase Jitter Section 125MHz, Integration Range 12kHz – 20MHz 0.17 ps tsk(o) Output Skew; NOTE 2, 4 ƒ = 133MHz 50 ps tsk(pp) Part-to-Part Skew; NOTE 3, 4 600 ps t R Output Rise Time 30% to 70% 250 500 ps t F Output Fall Time 30% to 70% 250 500 ps odc Output Duty Cycle 40 60 % NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE: All parameters measured at 166MHz unless noted otherwise. NOTE 1: Measured from V DD /2 of the input to V DDO /2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V DDO /2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at V DDO /2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. Symbol Parameter Test Conditions Minimum Typical Maximum Units V IH Input High Voltage 2 V DD + 0.3 V V IL Input Low Voltage -0.3 1.3 V I IH Input High Current V DD = V IN = 3.465V 150 µA I IL Input Low Current V DD = 3.465V, V IN = 0V -5 µA V OH Output High Voltage; NOTE 1 2.1 V V OL Output Low Voltage; NOTE 1 0.5 V NOTE 1: Outputs terminated with 50 Ω ΩΩΩ to V DDO /2. See Parameter Measurement Section, “3.3V/2.5V Output Load Test Circuit”. |
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