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PBLS4002Y Datasheet(PDF) 3 Page - Nexperia B.V. All rights reserved |
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PBLS4002Y Datasheet(HTML) 3 Page - Nexperia B.V. All rights reserved |
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3 / 12 page ![]() Nexperia PBLS4002Y 40 V, 500 mA PNP loadswitch transistor 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit TR1: PNP low VCEsat transistor VCBO collector-base voltage open emitter - -40 V VCEO collector-emitter voltage open base - -40 V VEBO emitter-base voltage open collector - -6 V IClim limiting collector current - -500 mA ICM peak collector current tp ≤ 1 ms; single pulse - -1 mA IB base current - -50 mA IBM peak base current single pulse; tp ≤ 1 ms - -100 mA Ptot total power dissipation Tamb ≤ 25 °C [1] - 200 mW TR2: NPN resistor-equipped transistor VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 10 V input voltage TR2 positive - 30 V VI input voltage input voltage TR2 negative - -10 V IO output current - 100 mA ICM peak collector current tp ≤ 1 ms; single pulse - 100 mA Ptot total power dissipation Tamb ≤ 25 °C [1] - 200 mW Per device Ptot total power dissipation - 300 mW Tj junction temperature - 150 °C Tamb ambient temperature -65 150 °C Tstg storage temperature -65 150 °C [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per device Rth(j-a) thermal resistance from junction to ambient in free air [1] - - 416 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. PBLS4002Y All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet 1 January 2023 3 / 12 |
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