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©2016 Integrated Device Technology, Inc.

Revision B, February 18, 2016

85311I Datasheet

Parameter Measurement Information, continued

Output Duty Cycle/Pulse Width/Period

Output Rise/Fall Time

Applications Information

Wiring the Differential Input to Accept Single Ended Levels

Figure 1 shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF = VCC/2 is

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio of

R1 and R2 might need to be adjusted to position the V_REF in the

center of the input voltage swing. For example, if the input clock swing

is only 2.5V and VCC = 3.3V, V_REF should be 1.25V and R2/R1 =

0.609.

Figure 1. Single-Ended Signal Driving Differential Input

nQ[0:1]

Q[0:1]

nQ[0:1]

Q[0:1]

V_REF

Single Ended Clock Input

VCC

CLK

nCLK

R1

1K

C1

0.1u

R2

1K