85352AYILF datasheet(1/21 Pages) RENESAS

Part #	85352AYILF

Description	12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

PDF	21 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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1

Revision D, December 1, 2015

General Description

The 85352 is a 12 bit, 2-to-1 LVPECL Clock Buffer. Individual input

select controls support independent multiplexer operation from a

common clock input source. Clock inputs accept most standard

differential levels.

The 85352 is characterized at full 3.3V or mixed 3.3V core/2.5V

output operating supply modes.

Features

• Twelve, 2-to-1 multiplexers with LVPECL outputs

• Selectable differential CLKx, nCLKx input pairs

• CLK, nCLK pair can accept the following differential input

levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• Maximum output frequency: 700MHz

• Individual select control for each multiplexer

• Select inputs accept LVCMOS / LVTTL levels

• Propagation delay: 2ns (maximum)

• Additive Phase Jitter, RMS: 0.21ps (typical), 3.3V

• Full 3.3V or mixed 3.3V core/2.5V output supply

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package

48 47 46 45 44 43 42 41 40 39 38 37

13 14 15 16 17 18 19 20 21 22 23 24

1

2

3

4

5

6

7

8

9

10

11

12

36

35

34

33

32

31

30

29

28

27

26

25

Q0

nQ0

Q1

nQ1

Q2

nQ2

Q3

nQ3

Q4

nQ4

Q5

nQ5

Q6

nQ6

Q7

nQ7

Q8

nQ8

Q9

nQ9

Q10

nQ10

Q11

nQ11

85352

0

1

0

1

12

nQ0

Q0

nQ11

Q11

SEL0:SEL11

CLK0

nCLK0

CLK1

nCLK1

Pulldown

Pullup/Pulldown

Pulldown

Block Diagram

Pin Assignment

85352

48-Lead TQFP, E-Pad

7mm x 7mm x 1.0mm package body

Y Package

Top View

85352

Datasheet

12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

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85352AYILF Datasheet(PDF) 1 Page - Renesas Technology Corp

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