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ADAV400 Datasheet(PDF) 16 Page - Analog Devices |
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ADAV400 Datasheet(HTML) 16 Page - Analog Devices |
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16 / 36 page ![]() ADAV400 Rev. 0 | Page 16 of 36 I2C Read and Write Operations Table 6 shows the timing of a single word write operation. Every ninth clock, the ADAV400 issues an acknowledge by pulling SDA low. Table 7 shows the timing of a burst mode write sequence. This table shows an example where the target destination registers are two bytes. The ADAV400 auto-increments its subaddress register counter every two bytes until a stop condition occurs. The timing of a single word read operation is shown in Table 8. Note that the first R/W bit is still a 0, indicating a write operation. This is because the subaddress must be written to set up the internal address. After the ADAV400 acknowledges the receipt of the subaddress, the master must issue a repeated start command followed by the chip address byte with the R/W set to 1 (read). The ADAV400 responds with the read result on SDA. The master then responds every ninth clock with an acknowledge pulse to the ADAV400. Table 9 shows the timing of a burst mode read sequence. This table shows an example where the target read registers are two bytes. The ADAV400 increments its subaddress register every two bytes because the requested subaddress corresponds to a register or memory area with word lengths of two bytes. Other address ranges may have a variety of word lengths ranging from one to six bytes; the ADAV400 always decodes the subaddress and sets the auto-increment circuit so that the address increments after the appropriate number of bytes. Key for Table 6 to Table 9: S = start bit P = stop bit AM = acknowledge by master AS = acknowledge by slave Table 6. Single Word I2C Write S Chip address, R/W = 0 AS Subaddress high AS Subaddress low AS Data Byte 1 AS Data Byte 2 … AS Data Byte N P Table 7. Burst Mode I2C Write S Chip address, R/W = 0 AS Subaddress high AS Subaddress low AS Data-Word 1 Byte 1 AS Data-Word 1 Byte 2 AS Data-Word 2 Byte 1 AS Data-Word 2 Byte 2 AS … P Table 8. Single Word I2C Read S Chip address, R/W = 0 AS Subaddress high AS Subaddress low AS S Chip address, R/W = 1 AS Data Byte 1 AM Data Byte 2 … AM Data Byte N P Table 9. Burst Mode I2C Read S Chip address, R/W = 0 AS Subaddress high AS Subaddress low AS S Chip address, R/W = 1 AS Data-Word 1 Byte 1 AM Data-Word 1 Byte 2 AM … P |
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