ICS552-02

LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER

CLOCK MUX AND BUFFER

IDT™ / ICS™ LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER

5

ICS552-02

REV L 051310

AC Electrical Characteristics

VDD = 2.5V ±5%, Ambient Temperature -40 to +85 ° C, unless stated otherwise

VDD = 3.3V ±5%, Ambient Temperature -40 to +85 ° C, unless stated otherwise

VDD = 5.0V ±5%, Ambient Temperature -40 to +85 ° C, unless stated otherwise

Notes: 1. With rail-to-rail input clock.

2. Between any two outputs with equal loading.

3. Propagation delay matching through the part.

4. Duty cycle on outputs will match incoming clock duty cycle. Consult IDT for tight duty cycle clock

generators.

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Input Frequency

0

200

MHz

Output Rise Time

tOR

0.8 to 2.0 V, CL=15 pF

1.0

1.5

ns

Output Fall Time

tOF

2.0 to 0.8 V, CL=15 pF

1.0

1.5

ns

Propagation Delay

Note 1

3.5

ns

Output to output skew

Note 2

Rising edges at VDD/2

0

50

ps

Input A to Input B skew

Note 3

0

50

ps

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Input Frequency

0

200

MHz

Output Rise Time

tOR

0.8 to 2.0 V, CL=15 pF

0.6

1.0

ns

Output Fall Time

tOF

2.0 to 0.8 V, CL=15 pF

0.6

1.0

ns

Propagation Delay

Note 1

2.0

3.0

5.5

ns

Output to output skew

Note 2

Rising edges at VDD/2

0

50

ps

Input A to Input B skew

Note 3

0

50

ps

Part to Part Skew

3.5

ns

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Input Frequency

0

200

MHz

Output Rise Time

tOR

0.8 to 2.0 V, CL=15 pF

0.3

0.7

ns

Output Fall Time

tOF

2.0 to 0.8 V, CL=15 pF

0.3

0.7

ns

Propagation Delay

Note 1

2.8

ns

Output to output skew

Note 2

Rising edges at VDD/2

0

50

ps

Input A to Input B skew

Note 3

0

50

ps