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ICS1524AMLF Datasheet(PDF) 20 Page - Renesas Technology Corp

Part # ICS1524AMLF
Description  Dual Output Phase Controlled SSTL_3/PECL Clock Generator
PDF  25 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS1524AMLF Datasheet(HTML) 20 Page - Renesas Technology Corp

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ICS1524A
20
DPA Delay-16 Element Resolution
0
2
4
6
8
10
12
14
16
18
20
04
8
12
DPA Setting
50 MHz - SVGA @ 72 Hz
157.5 MHz - SXGA @ 85 Hz
DPA Delay - 32 Element Resolution
0
5
10
15
20
25
30
35
40
45
0
4
8
1216
2024
28
DPA Setting
25.175 MHz - VGA @ 60 Hz
78.75 MHz - XGA @ 75 Hz
16
DPA Delay - 64 Element Resolution
0
10
20
30
40
50
60
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90
0
4
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24
28
32
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60
DPA Setting
12.27 MHz - NTSC
39.8 MHz - SVGA @ 60
32
64
Note:
Maximum number of data points used for this graph.



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