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HT36B4 Datasheet(PDF) 18 Page - Holtek Semiconductor Inc |
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HT36B4 Datasheet(HTML) 18 Page - Holtek Semiconductor Inc |
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18 / 38 page ![]() HT36B4 Rev. 1.00 18 October 18, 2006 D/A Converter Interface HT36B4 provides the IIS serial data format to support the multiple D/A converters, one bit clock output and a word clock signal for left/right stereo serial data transmission. Clock Signal The bit clock output signals DCK are used to synchronize the IIS serial data. The word clock signal LOAD divides the serial data into left channel and right channel data for two-way audio out- put. · LOAD The word clock signal LOAD is used for IIS serial data. The stereo serial data consists of 16-channel sound generator. · DOUT On IIS format, a ²H² state on LOAD is used for the right channel, and a ²L² state is used for the left channel. · DCK DCK bit clock is the clock source for the signal. Stereo Serial Data Format The audio output data is in serial mode with 16 bit digi- tal signal and LSB first output. There is a high sam- pling rate of 50kHz when the system clock is 12.8MHz and with two channel outputs for Right/Left channel. HT36B4 provides only one serial data format as IIS mode. The user could directly connect a D/A converter which can accept the IIS serial data format, like HT82V731. Mask Option No. Mask Option Function 1 WDT source On-chip RC/Instruction clock/ disable WDT 2 CLRWDT times One time, two times (CLR WDT1/WDT2) 3 Wake-up PA only 4 Pull-High PA, PB, PC, PD input 5 OSC mode Crystal or Resistor type 6 I/O DAC pin PD1~3 DAC pin selection D O U T D C K L O A D L S B M S B S a m p l e O u t R i g h t L e f t D/A Converter Timing A_R ENV1 ENV0 Volume Control Bit Control Bit Final Value Mode 0 0 0 VL2~0, VR2~0 111b Release mode 0 0 1 VL1~0, VR1~0 11b 0 1 0 VL0, VR0 1b x 1 1 No Bit unchanged No change mode 1 0 0 VL2~0, VR2~0 000b Attach mode 1 0 1 VL1~0, VR1~0 00b 1 1 0 VL0, VR0 0b Envelope Type Definition |
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