S29CD032J datasheet(3/76 Pages) SPANSION

3 / 76 page

This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qual-

ification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document

may be revised by subsequent versions or modifications due to changes in technical specifications.

Publication Number S29CD-J_CL-J_00

Revision B

Amendment 1

Issue Date September 27, 2006

General Description

The Spansion S29CD-J and S29CL-J devices are Floating Gate products fabricated in 110-nm process

technology. These burst-mode Flash devices are capable of performing simultaneous read and write

operations with zero latency on two separate banks, using separate data and address pins. These products

can operate up to 75 MHz (32 Mb) or 66 MHz (16 Mb), and use a single VCC of 2.5 V to 2.75 V (S29CD-J) or

3.0 V to 3.6 V (S29CL-J) that make them ideal for today’s demanding automotive applications.

Distinctive Characteristics

Single 2.6 V (S29CD-J) or 3.3 V (S29CL-J) for read/program/

erase

110 nm Floating Gate Technology

Simultaneous Read/Write operation with zero latency

x32 Data Bus

Dual Boot Sector Configuration (top and bottom)

Flexible Sector Architecture

– CD016J & CL016J: Eight 2K Double word, Thirty-two 16K Double

word, and Eight 2K Double Word sectors

– CD032J & CL032J: Eight 2K Double word, Sixty-two 16K Double

Word, and Eight 2K Double Word sectors

VersatileI/O™ control (1.65 V to 3.6 V)

Programmable Burst Interface

– Linear for 2, 4, and 8 double word burst with or without wrap around

Secured Silicon Sector that can be either factory or customer

locked

20 year data retention (typical)

Cycling Endurance: 1 million write cycles per sector (typical)

Command set compatible with JEDEC (JC42.4) standard

Supports Common Flash Interface (CFI)

Extended Temperature range

Persistent and Password methods of Advanced Sector

Protection

Unlock Bypass program command to reduce programming

time

ACC input pin to reduce factory programming time

Data Polling bits indicate program and erase operation

completion

Hardware (WP#) protection of two outermost sectors in the

large bank

Ready/Busy (RY/BY#) output indicates data available to

system

Suspend and Resume commands for Program and Erase

Operation

Offered Packages

– 80-pin PQFP

– 80-ball Fortified BGA

– Pb-free package option available

– Known Good Die

Performance Characteristics

S29CD-J & S29CL-J Flash Family

S29CD032J, S29CD016J, S29CL032J, S29CL016J

32/16 Megabit CMOS 2.6 Volt or 3.3 Volt-only

Simultaneous Read/Write, Dual Boot, Burst Mode

Flash Memory with VersatileI/O™

Data Sheet (Preliminary)

Read Access Times

Speed Option (MHz)

(32 Mb only)

Max Asynch. Access Time, ns (tACC)48

Max Synch. Burst Access, ns (tBACC)

7.5 (FBGA)

Min Initial Clock Delay (clock cycles)

Max CE# Access Time, ns (tCE)52

Max OE# Access time, ns (tOE)20

Current Consumption (Max values)

Continuous Burst Read @ 75 MHz

90 mA

Program

50 mA

Erase

50 mA

Standby Mode

60 µA

Typical Program and Erase Times

Double Word Programming

18 µs

Sector Erase

1.0 s

S29CD032J Datasheet(PDF) 3 Page - SPANSION

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