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ADV7393EBZ Datasheet(PDF) 87 Page - Analog Devices

Part # ADV7393EBZ
Description  Low Power, Chip Scale 10-Bit SD/HD Video Encoder
PDF  96 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7393EBZ Datasheet(HTML) 87 Page - Analog Devices

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ADV7390/ADV7391/ADV7392/ADV7393
Rev. 0 | Page 87 of 96
Table 73. 16-Bit 525i RGB In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xC9
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
0x87
0x80
RGB input enabled.
0x88
0x08
16-bit input enabled.
0x8A
0x0C
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
Table 74. 8-Bit 625i YCrCb In (EAV/SAV), YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.
Table 75. 8-Bit 625i YCrCb In (EAV/SAV), CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC3
Pixel data valid. CVBS/S-Video out.
SSAF PrPb filter enabled. Active video
edge control enabled.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.
Table 76. 8-Bit 625i YCrCb In, YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8A
0x0C
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.
Table 77. 8-Bit 625i YCrCb In (EAV/SAV), RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.
Table 78. 8-Bit 625i YCrCb In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8A
0x0C
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x8C
0xCB
PAL FSC value.
0x8D
0x8A
PAL FSC value.
0x8E
0x09
PAL FSC value.
0x8F
0x2A
PAL FSC value.



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