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74LVC2G08DP Datasheet(PDF) 9 Page - Nexperia B.V. All rights reserved |
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74LVC2G08DP Datasheet(HTML) 9 Page - Nexperia B.V. All rights reserved |
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9 / 20 page ![]() Nexperia 74LVC2G08 Dual 2-input AND gate VEXT VCC VI VO 001aae235 DUT CL RT RL RL PULSE GENERATOR VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf Test data is given in Table 10. Definitions for test circuit: RL = Load resistance; CL = Load capacitance including jig and probe capacitance; RT = Termination resistance should be equal to output impedance Zo of the pulse generator; VEXT = Test voltage for switching times. Fig. 8. Test circuit for measuring switching times Table 10. Test data Supply voltage Input Load VEXT VCC VI tr, tf CL RL tPLH, tPHL 1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 kΩ open 2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω open 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω open 74LVC2G08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 18 — 23 January 2023 9 / 20 |
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