1998 Apr 01

8

Philips Semiconductors

Product specification

N-channel enhancement mode vertical

D-MOS transistor

BSP121

PACKAGE OUTLINE

UNIT

cD

E

Qy

w

v

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

EIAJ

mm

0.10

0.01

1.8

1.5

0.80

0.60

3.1

2.9

0.32

0.22

6.7

6.3

3.7

3.3

2.3

e

4.6

7.3

6.7

1.1

0.7

0.95

0.85

0.1

0.1

0.2

DIMENSIONS (mm are the original dimensions)

SOT223

96-11-11

97-02-28

D

e

A

Q

detail X

E

A

B

B

c

y

0

2

4 mm

scale

A

X

13

2

4

Plastic surface mounted package; collector pad for good heat transfer; 4 leads

SOT223