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BSP121 Datasheet(PDF) 2 Page - NXP Semiconductors |
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BSP121 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 12 page ![]() 1998 Apr 01 2 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP121 DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and designed for use as a line current interrupter in telephone sets and for application in relay, high-speed and line-transformer drivers. FEATURES • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown QUICK REFERENCE DATA PINNING - SOT223 Marking code BSP121 Drain source voltage VDS max. 200 V Gate-source voltage (open drain) ±VGSO max. 20 V Drain current (DC) ID max. 350 mA Total power dissipation up to Tamb =25 °CPtot max. 1.5 W Drain-source on-resistance typ. max. 4.5 6.0 Ω Ω ID = 400 mA; VGS = 10 V RDS(on) Transfer admittance min. typ. 200 350 mS mS ID = 400 mA; VDS = 25 V Yfs 1 = gate 2 = drain 3 = source 4 = drain PIN CONFIGURATION Fig.1 Simplified outline and symbol. handbook, halfpage MAM054 4 12 3 Top view s d g |
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