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BSS110 Datasheet(PDF) 2 Page - NXP Semiconductors |
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BSS110 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 9 page ![]() 1995 Apr 07 2 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSS110 FEATURES • Low threshold voltage • Direct interface to C-MOS, TTL, etc. • High speed switching • No secondary breakdown. APPLICATIONS • Intended for use as a Line current interruptor in telephone sets and for applications in relay, high speed and line transformer drivers. DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a TO-92 variant package. PINNING - TO-92 variant PIN SYMBOL DESCRIPTION 1 s source 2 g gate 3 d drain CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. Fig.1 Simplified outline and symbol. handbook, halfpage s d g MAM144 1 3 2 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage (DC) − −50 V VGSO gate-source voltage (DC) open drain − ±20 V VGSth gate-source threshold voltage ID = −1 mA; VDS = VGS −0.8 −2 V ID drain current (DC) − −170 mA RDSon drain-source on-state resistance ID = −170 mA; VGS = −10 V − 10 Ω Ptot total power dissipation up to Tamb = 25 °C − 830 mW |
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