CS5467 datasheet(36/46 Pages) CIRRUS

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CS5467

DS714A1

ADVANCE RELEASE

6.2.7 Epsilon (

ε) Register

Address: 17

Default = 0x01999A = 0.0125 sec

Epsilon (

ε) is the ratio of the input line frequency to the sample frequency of the ADC (See Section 5.4 Perform-

ing Measurements

on page 17). Epsilon is either written to the register, or measured during conversions. The

value is represented in two's complement notation and in the range of -1.0

≤

ε < 1.0, with the binary point to the

right of the MSB. Negative values have no significance.

6.2.8 Cycle Count Register

Address: 19

Default = 0x000FA0 = 4000

Cycle Count, denoted as N, determines the length of one computation cycle. During continuous conversions,

the computation cycle frequency is (MCLK/K)/(1024

∗N). A one second computational cycle period occurs when

MCLK = 4.096 MHz, K = 1, and N = 4000.

6.2.9 Reactive Power (QTrig, Q2Trig) Registers

Address: 20 (QTrig), 21 (Q2Trig)

The Reactive Power (QTrig, Q2Trig) is calculated using trigonometric identities. (See Section 4.3 Power Mea-

surements

on page 15). The value is represented in unsigned notation and in the range of 0

≤ QTrig < 1.0

≤ Q2Trig < 1.0), with the binary point to the right of the MSB.

6.2.10 Temperature Gain (TGain) Register

Address: 22

Default = 0x34E2E7 = 26.443169117

Temperature gain (TGain) is utilized to convert from one temperature scale to another. The Celsius scale (

oC) is

the default. Values will be within in the range of 0

≤ TGain < 128. The value is represented in unsigned notation,

with the binary point to the right of bit 7th MSB.

MSB

LSB

-(20)2-1

2-2

2-3

2-4

2-5

2-6

2-7

.....

2-17

2-18

2-19

2-20

2-21

2-22

2-23

MSB

LSB

223

222

221

220

219

218

217

216

.....

MSB

LSB

-(20)2-1

2-2

2-3

2-4

2-5

2-6

2-7

.....

2-17

2-18

2-19

2-20

2-21

2-22

2-23

MSB

LSB

2-1

.....

2-11

2-12

2-13

2-14

2-15

2-16

2-17

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