FS8170
Page 9
May 2003
Phase/Frequency Detector (PFD)
The PFD compares an internal input frequency divider output signal, f
V, with an internal
reference frequency divider output signal, f
R, and generates an error signal, DO, which is
proportional to the phase error between f
V and fR. The DO output is intended for use with
a passive filter as shown in Fig. 2 (a). The polarity of DO is selectable by setting the bit FC
to high or low. The setting should depend on the frequency-voltage characteristic of exter-
nal VCO as depicted in Fig. 2 (b).
The input/output waveforms for the PFD are shown in Fig. 3.
Fig. 2 – Low-pass filter and external VCO frequency-voltage characteristic
Table 6: Data format for FC bit (LDS = HIGH)
FC = HIGH
FC = LOW
DO
φR
φPFOLD
DO
φR
φPFOLD
f
R > fV
HL
L
FOLD =
f
R
LH
Z
a
FOLD =
f
V
f
R < fV
LH
Z
H
L
L
f
R = fV
Z
L
ZZ
L
Z
a. Z denotes high impedance state
DO
VCO
(a) Passive low-pass filter
(1)
(2)
f
VCO
V
DO
(b) VCO frequency-voltage characteristic
Note: If VCO has a positive tuning curve similiar to trace
(1), set FC = “H,” otherwise if the VCO has a negative
tuning curve similar to trace (2), set FC = “L.”
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