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DS3984Z Datasheet(PDF) 21 Page - Dallas Semiconductor |
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DS3984Z Datasheet(HTML) 21 Page - Dallas Semiconductor |
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21 / 24 page ![]() 4-Channel Cold-Cathode Fluorescent Lamp Controller ____________________________________________________________________ 21 Applications Information Addressing Multiple DS3984s On a Common I2C Bus Each DS3984 responds to one of two possible slave addresses based on the state of the address input (A0). For information about device addressing see the I2C Communications section. Power-Supply Decoupling To achieve best results, it is recommended that each VCC pin is decoupled with a 0.01µF or a 0.1µF capacitor to GND. Use high-quality, ceramic, surface-mount capac- itors, and mount the capacitors as close as possible to the VCC and GND pins to minimize trace inductance. Setting the RMS Lamp Current Resistor R8 in the typical operating circuit (Figure 12) sets the lamp current. R8 = 140 Ω corresponds to a 5mARMS lamp current as long as the current waveform is approximately sinusoidal. The formula to determine the resistor value for a given sinusoidal lamp current is: Component Selection External component selection has a large impact on the overall system performance and cost. The two most important external components are the transformers and n-channel MOSFETs. The transformer should be able to operate in the 40kHz to 80kHz frequency range of the DS3984, and the turns ratio should be selected so the MOSFET drivers run at 28% to 35% duty cycle during steady state operation. The transformer must be able to withstand the high open-circuit voltage that will be used to strike the lamp. Additionally, its primary/secondary resistance and inductance characteristics must be considered because they contribute significantly to determining the efficiency and transient response of the system. Table 5 shows a transformer specification that has been utilized for a 12V inverter supply, 438mm x 2.2mm lamp design. The n-channel MOSFET must have a threshold voltage that is low enough to work with logic-level signals, a low on-resistance to maximize efficiency and limit the n- channel MOSFET’s power dissipation, and a break- down voltage high enough to handle the transient. The breakdown voltage should be a minimum of 3x the inverter voltage supply. Additionally, the total gate charge must be less than QG, which is specified in the Recommended DC Operating Conditions table. These specifications are easily met by many of the dual n- channel MOSFETs now available in SO-8 packages. Table 6 lists suggested values for the external resistors and capacitors used in the typical operating circuit. R ILAMP RMS 8 1 2 () = × Figure 11. I2C Communications Examples XXXXXXXX 10 1 0 A0 0 0 0 COMMUNICATIONS KEY WRITE A SINGLE BYTE 8-BITS ADDRESS OR DATA WHITE BOXES INDICATE THE MASTER IS CONTROLLING SDA NOTES 2) THE FIRST BYTE SENT AFTER A START CONDITION IS ALWAYS THE SLAVE ADDRESS FOLLOWED BY THE READ/WRITE BIT. SHADED BOXES INDICATE THE SLAVE IS CONTROLLING SDA START ACK NOT ACK S SA A A P DATA MEMORY ADDRESS 10 1 0 A0 0 0 0 10 1 0 A0 0 0 0 READ A SINGLE BYTE SA ASR AN P DATA MEMORY ADDRESS A PN SR STOP REPEATED START 1) ALL BYTES ARE SENT MOST SIGNIFICANT BIT FIRST. |
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