GWIXP420BBT datasheet(104/134 Pages) INTEL

104 / 134 page

Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor

March 2005

Datasheet

104

Document Number: 252479, Revision: 005

Table 54.

Intel® Multiplexed Mode Values

Symbol

Parameter

Min.

Max.

Units

Notes

Talepulse

Pulse width of EX_ALE (ADDR is valid at the rising edge of

EX_ALE)

141

Cycles

1, 7

Tale2addrhold

Valid address hold time after from falling edge of EX_ALE

Cycles

1, 2, 7

Tdval2valwrt

Write data valid prior to EX_WR_N falling edge

Cycles

3, 7

Twrpulse

Pulse width of the EX_WR_N

Cycles

4, 7

Tdholdafterwr

Valid data after the rising edge of EX_WR_N

Cycles

5, 7

Tale2valcs

Valid chip select after the falling edge of EX_ALE

Cycles

Trdsetup

Data valid required before the rising edge of EX_RD_N

Trdhold

Data hold required after the rising edge of EX_RD_N

Trecov

Time needed between successive accesses on expansion

interface.

116

Cycles

Notes:

The EX_ALE signal is extended from 1 to 4 cycles based on the programming of the T1 timing

parameter. The parameter Tale2addrhold is fixed at 1 cycle.

Setting the address phase parameter (T1) will adjust the duration that the address appears to the external

device.

Setting the data setup phase parameter (T2) will adjust the duration that the data appears prior to a data

strobe (read or write) to an external device.

Setting the data strobe phase parameter (T3) will adjust the duration that the data strobe appears (read

or write) to an external device. Data will be available during this time as well.

Setting the data hold strobe phase parameter (T4) will adjust the duration that the chip selects, address,

and data (during a write) will be held.

Setting the recovery phase parameter (T5) will adjust the duration between successive accesses on the

expansion interface.

One cycle is the period of the Expansion Bus clock.

Clock to output delay for all signals will be a maximum of 15 ns for devices requiring operation in

synchronous mode.

Timing tests were performed with a 70-pF capacitor to ground.

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