UPD78P058F datasheet(39/78 Pages) RENESAS

39 / 78 page

µPD78P058F

VDD = 5.0 V

±10%

0.1

µA

VDD = 3.0 V

±10%

0.05

µA

VDD = 5.0 V

±10%

µA

VDD = 3.0 V

±10%

0.5

µA

DC Characteristics (TA = –40 to +85

°C, VDD = 2.7 to 6.0 V)

Parameter

Symbol

Test Conditions

MIN.

TYP.

MAX.

Unit

Supply currentNote 1

IDD1

5.0-MHz crystal oscillation operating

VDD = 5.0 V

±10%Note 5

515

mode (fXX = 2.5 MHz)Note 2

VDD = 3.0 V

±10%Note 6

0.7

2.1

5.0-MHz crystal oscillation operating

VDD = 5.0 V

±10%Note 5

9.0

27.0

mode (fXX = 5.0 MHz)Note 3

VDD = 3.0 V

±10%Note 6

1.0

3.0

IDD2

5.0-MHz crystal oscillation HALT

VDD = 5.0 V

±10%

1.4

4.2

mode (fXX = 2.5 MHz)Note 2

VDD = 3.0 V

±10%

0.5

1.5

5.0-MHz crystal oscillation HALT

VDD = 5.0 V

±10%

1.6

4.8

mode (fXX = 5.0 MHz)Note 3

VDD = 3.0 V

±10%

0.65

1.95

IDD3

32.768-kHz

VDD = 5.0 V

±10%

135

270

µA

crystal oscillation operating modeNote 4 VDD = 3.0 V ±10%

190

µA

IDD4

32.768-kHz

VDD = 5.0 V

±10%

µA

crystal oscillation HALT modeNote 4

VDD = 3.0 V

±10%

µA

IDD5

XT1 = VDD

STOP mode

Feedback resistor used

IDD6

XT1 = VDD

STOP mode

Feedback resistor not used

Notes

1. Passed through the VDD and AVDD pins. Does not include the current which is passed through the A/D

converter, D/A converter, and on-chip pull-up resistor.

2. fXX = fX/2 operation (when the oscillation mode selection register (OSMS) is set to 00H)

3. fXX = fX operation (when OSMS is set to 01H)

4. When the main system clock is stopped

5. High-speed mode operation (when the processor clock control register (PCC) is set to 00H)

6. Low-speed mode operation (when PCC is set to 04H)

Remarks

fXX : Main system clock frequency (fX or fX/2)

: Main system clock oscillation frequency

UPD78P058F Datasheet(PDF) 39 Page - Renesas Technology Corp

UPD78P058F Datasheet(HTML) 39 Page - Renesas Technology Corp

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