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RT1716WSC Datasheet(PDF) 13 Page - Richtek Technology Corporation |
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RT1716WSC Datasheet(HTML) 13 Page - Richtek Technology Corporation |
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13 / 37 page ![]() RT1716 13 DS1716-04 March 2020 www.richtek.com © Copyright 2020 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. I2C Interface The following table shows the RT1716 unique address as below. RT1716 I 2C Slave Address MSB LSB R/W bit R/W 100111 0 1/0 9D/9C The I2C interface bus must be connect a resistor 1k Ω to power node and independent connection to processor, individually. The I2C timing diagrams are listed below. I2C Waveform Information S 0 1 A P LSB MSB A Assume Address = m Data for Address = m Data for Address = m + N - 1 A Data for Address = m + 1 Sr Slave Address Register Address Slave Address Data 1 R/W A A A Read N bytes of data from Registers LSB MSB Data 2 Data N LSB MSB S 0 1 A P LSB MSB Assume Address = m Data for Address = m Sr Slave Address Register Address Slave Address Data R/W A A A Read single byte of data from Register S 0 P Assume Address = m Data for Address = m Data for Address = m + N - 1 Data for Address = m + 1 R/W Data N LSB MSB A A A A A LSB Slave Address Register Address Data 1 Data 2 MSB MSB LSB Write N bytes of data to Registers Driven by Master, Driven by Slave, Start, Repeat Start Stop, S Sr P S 0 P Assume Address = m Data for Address = m R/W A A A Slave Address Register Address Data MSB LSB Write single byte of data to Register Read and Write Function SDA SCL tF tLOW tHD;STA tHD;DAT tHIGH tSU;DAT tSU;STA tHD;STA tSP tBUF tSU;STO PS tR Sr S tF tR |
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