RT4823

Copyright © 2022 Richtek Technology Corporation. All rights reserved.

is a registered trademark of Richtek Technology Corporation.

DS4823-01

September 2022

www.richtek.com

5

Table 2. The RT4823 Start-Up Description

Mode

Description

Condition

LIN

Linear startup

VIN - 200mV  VOUT

Soft-Start

Boost soft-start

0.99 x VOUT_Target > VOUT  VIN - 200mV

Boost

Boost mode

VOUT_Target  0.99 x VOUT_Target

If VIN increases higher than VOUT

Auto Bypass

Auto bypass mode

VIN  VOUT

Control loop auto transfer between auto

bypass mode and boost mode.

Control loop auto transfer between bypass

mode and boost mode

VOUT

Linear Startup

VOUT_Target

VIN - 200mV

VIN

Soft-Start

0.99 x VOUT_Target

Boost mode

Auto bypass mode

Figure 1. VOUT Mode Transition Diagram with EN L to H and VIN Variation (IOUT = 0A)

Protection

The RT4823 features protections listed in the table below. It describes the protection behaviors.

Protection

Type

Fault Event

Trigger

Fault Deglitch

Time

Protection Method

Fault Protection

Latch Time

Reset Method

OCP_IL5A

IL_peak > 5A

No delay

Turn off UG, LG

20ms,

Auto-recovery

IL_peak < 5A

OCP

IL_peak > 3.6A

No delay

Stop LG switching

N/A

IL_valley < 3.3A

OVP

VOUT > 6V

100ns

Turn off UG, LG

N/A

VOUT < 6V

SCP

VOUT < 0.7V

No delay

Turn off UG, LG

20ms,

Auto-recovery

VOUT > 0.7V

OTP

TEMP > 150°C

170

s

Turn off UG, LG

Turn off UG, LG

TEMP < 130°C

SCP_SS

VIN - VOUT > 0.2V

2ms

UG OCP = 0.3A

N/A

VIN - VOUT <

0.2V

OCP_BYP

IL > 0.3A

2ms

Turn off UG

20ms,

Auto-recovery

IL < 0.3A

SCP_BYP

VIN - VOUT > 0.7V

No delay

Turn off UG, LG

20ms,

Auto-recovery

VIN - VOUT <

0.7V