5

AM26C32

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SLLS104L – DECEMBER 1990 – REVISED OCTOBER 2018

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Copyright © 1990–2018, Texas Instruments Incorporated

(1)

All typical values are at VCC = 5 V, VIC = 0, and TA = 25°C.

(2)

The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-

mode input voltage.

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX

UNIT

VIT+

Differential input high-threshold

voltage

VO = VOH(min), IOH = –440

µA

VIC = –7 V to 7 V

0.2

V

VIC = 0 V to 5.5 V

0.1

VIT–

Differential input low-threshold

voltage

VO = 0.45 V, IOL = 8 mA

VIC = –7 V to 7 V

–0.2(2)

V

VIC = 0 V to 5.5 V

–0.1(2)

Vhys

Hysteresis voltage (VIT+ – VIT−)

60

mV

VIK

Enable input clamp voltage

VCC = 4.5 V, II = –18 mA

–1.5

V

VOH

High-level output voltage

VID = 200 mV, IOH = –6 mA

3.8

V

VOL

Low-level output voltage

VID = –200 mV, IOL = 6 mA

0.2

0.3

V

IOZ

OFF-state (high-impedance state)

output current

VO = VCC or GND

±0.5

±5

µA

II

Line input current

VI = 10 V, Other input at 0 V

1.5

mA

VI = –10 V, Other input at 0 V

–2.5

mA

IIH

High-level enable current

VI = 2.7 V

20

μA

IIL

Low-level enable current

VI = 0.4 V

–100

μA

ri

Input resistance

One input to ground

12

17

kΩ

ICC

Quiescent supply current

VCC = 5.5 V

10

15

mA

(1)

All typical values are at VCC = 5 V, TA = 25°C.

6.6 Switching Characteristics

over operating free-air temperature range, CL = 50 pF (unless otherwise noted)

PARAMETER

TEST CONDITIONS

AM26C32C

AM26C32I

AM26C32Q

AM26C32M

UNIT

MIN

TYP(1)

MAX

MIN

TYP(1)

MAX

tPLH

Propagation delay time,

low- to high-level

output

See Figure 2

9

17

27

9

17

27

ns

tPHL

Propagation delay time,

high- to low-level

output

9

17

27

9

17

27

ns

tTLH

Output transition time,

low- to high-level

output

See Figure 2

4

9

4

10

ns

tTHL

Output transition time,

high- to low-level

output

4

9

4

9

ns

tPZH

Output enable time to

high-level

See Figure 3

13

22

13

22

ns

tPZL

Output enable time to

low-level

13

22

13

22

ns

tPHZ

Output disable time

from high-level

See Figure 3

13

22

13

26

ns

tPLZ

Output disable time

from low-level

13

22

13

25

ns