WM8940GEFLSLASHV datasheet(62/85 Pages) WOLFSON

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WM8940

Pre-Production

Pre-Production, Rev 3.0, February 2007

2-WIRE SERIAL CONTROL MODE

The WM8940 supports software control via a 2-wire serial bus. Many devices can be controlled by

the same bus, and each device has a unique 7-bit device address (this is not the same as the 7-bit

address of each register in the WM8940).

The WM8940 operates as a slave device only. The controller indicates the start of data transfer with

a high to low transition on SDIN while SCLK remains high. This indicates that a device address and

data will follow. All devices on the 2-wire bus respond to the start condition and shift in the next eight

bits on SDIN (7-bit address + Read/Write bit, MSB first). If the device address received matches the

address of the WM8940, then the WM8940 responds by pulling SDIN low on the next clock pulse

(ACK). If the address is not recognised or the R/W bit is ‘1’ when operating in write only mode, the

WM8940 returns to the idle condition and wait for a new start condition and valid address.

During a write, once the WM8940 has acknowledged a correct address, the controller sends the first

byte of control data (B23 to B16, i.e. the WM8940 8 bit register address). The WM8940 then

acknowledges the first data byte by pulling SDIN low for one clock pulse. The controller then sends

the second byte of control data (B15 to B8, i.e. the most significant 8 bits of register data), and the

WM8940 acknowledges again by pulling SDIN low for one clock pulse. The controller then sends the

third byte of control data (B7 to B0, i.e. the remaining 8 bits of register data), and the WM8940

acknowledges again by pulling SDIN low for one clock pulse.

Transfers are complete when there is a low to high transition on SDIN while SCLK is high. After a

complete sequence the WM8940 returns to the idle state and waits for another start condition. If a

start or stop condition is detected out of sequence at any point during data transfer (i.e. SDIN

changes while SCLK is high), the device jumps to the idle condition.

Figure 37 2-Wire Serial Control Interface

In 2-wire mode the WM8940 has a fixed device address, 0011010.

RESETTING THE CHIP

The WM8940 can be reset by performing a write of any value to the software reset register (address

0 hex). This will cause all register values to be reset to their default values. In addition to this there

is a Power-On Reset (POR) circuit which ensures that the registers are set to default when the

device is powered up.

POWER SUPPLIES

The WM8940 requires four separate power supplies:

AVDD and AGND: Analogue supply, powers all analogue functions except the speaker output and

mono output drivers. AVDD can range from 2.5V to 3.6V and has the most significant impact on

overall power consumption (except for power consumed in the headphone). A larger AVDD slightly

improves audio quality.

SPKVDD and SPKGND: Headphone and Speaker supplies, power the speaker and mono output

drivers. SPKVDD can range from 2.5V to 3.6V. SPKVDD can be tied to AVDD, but it requires

separate layout and decoupling capacitors to curb harmonic distortion. With a larger SPKVDD,

louder headphone and speaker outputs can be achieved with lower distortion. If SPKVDD is lower

than AVDD, the output signal may be clipped.

DCVDD: Digital core supply, powers all digital functions except the audio and control interfaces.

DCVDD can range from 1.71V to 3.6V, and has no effect on audio quality. The return path for

DCVDD is DGND, which is shared with DBVDD.

DBVDD can range from 1.71V to 3.6V. DBVDD return path is through DGND.

WM8940GEFL/V Datasheet(PDF) 62 Page - Wolfson Microelectronics plc

WM8940GEFL/V Datasheet(HTML) 62 Page - Wolfson Microelectronics plc

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