WM8983GEFLSLASHV datasheet(91/123 Pages) WOLFSON

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Production Data

WM8983

PD Rev 4.0 November 2006

Switching on/off of the outputs is fully configurable by the user. Each output, OUT1, OUT2, OUT3

and OUT4 has 2 associated enables. OUT1_EN_0, OUT2_EN_0, OUT3_EN_0 and OUT4_EN_0

are the output enable signals which are used if the selected jack detection pin is at logic 0 (after de-

bounce). OUT1_EN_1, OUT2_EN_1, OUT3_EN_1 and OUT4_EN_1 are the output enable signals

which are used if the selected jack detection pin is at logic 1 (after de-bounce).

The jack detection enables operate as follows:

All OUT_EN signals have an AND function performed with their normal enable signals (in Table 51).

When an output is normally enabled at per Table 51, the selected jack detection enable (controlled

by selected jack detection pin polarity) is set 0; it will turn the output off. If the normal enable signal is

already OFF (0), the jack detection signal will have no effect due to the AND function.

During jack detection if the user desires an output to be un-changed whether the jack is in or not,

both the JD_EN settings, i.e. JD_EN0 and JD_EN1, should be set to 0000.

If jack detection is not enabled (JD_EN=0), the output enables default to all 1’s, allowing the outputs

to be controlled as normal via the normal output enables found in Table 51.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

5:4

JD_SEL

Pin selected as jack detection input

00 = GPIO1

01 = GPIO2

10 = GPIO3

11 = Reserved

R9 (09h)

GPIO control

JD_EN

Jack Detection Enable

0 = disabled

1 = enabled

3:0

JD_EN0

0000

Output enables when selected jack

detection input is logic 0.

[0]= OUT1_EN_0

[1]= OUT2_EN_0

[2]= OUT3_EN_0

[3]= OUT4_EN_0

R13 (00h)

7:4

JD_EN1

0000

Output enables when selected jack

detection input is logic 1

[4]= OUT1_EN_1

[5]= OUT2_EN_1

[6]= OUT3_EN_1

[7]= OUT4_EN_1

Table 64 Jack Detect Register Control Bits

WM8983GEFL/V Datasheet(PDF) 91 Page - Wolfson Microelectronics plc

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