ATMEGA3250 datasheet(37/353 Pages) ATMEL

37 / 353 page

ATmega325/3250/645/6450

2570J–AVR–11/06

SMCR – Sleep Mode Control

The Sleep Mode Control Register contains control bits for power management.

• Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0

These bits select between the five available sleep modes as shown in Table 15.

Note:

1. Standby mode is only recommended for use with external crystals or resonators.

• Bit 1 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the

SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is

the programmer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one

just before the execution of the SLEEP instruction and to clear it immediately after wak-

ing up.

PRR – Power Reduction

• Bits 7:4 - Res: Reserved bits

These bits are reserved bits in ATmega325/3250/645/6450 and will always read as

zero.

• Bit 3 - PRTIM1: Power Reduction Timer/Counter1

Writing logic one to this bit shuts down the Timer/Counter1 module. When

Timer/Counter1 is enabled, operation will continue like before the shutdown.

• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface

Writing logic one to this bit shuts down the Serial Peripheral Interface by stopping the

clock to the module. When waking up the SPI again, the SPI should be re-initialized to

ensure proper operation.

Bit

7654

321

0x33 (0x53)

–

SM2

SM1

SM0

SMCR

Read/Write

R/W

Initial Value

0000

000

Table 15. Sleep Mode Select

SM2

SM1

SM0

Sleep Mode

000

Idle

ADC Noise Reduction

010

Power-down

011

Power-save

100

Reserved

101

Reserved

110

Standby(1)

111

Reserved

Bit

210

(0x64)

–

PRTIM1

PRSPI

PRUSART0

PRADC

PRR

Read/Write

R/W

Initial Value

ATMEGA3250 Datasheet(PDF) 37 Page - ATMEL Corporation

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