LD7577 datasheet(13/18 Pages) LEADTREND

13 / 18 page

LD7577

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7577-DS-01 January 2009

Fig. 19

4.00V

3.80V

1.05V

Switching

Non- Switching

Switching

UVLO

- ON

UVLO- OFF

V BNO

Line

Voltage

Vcc

OUT

AC OK area

Fig.20

In order to protect BNO pin from being damaged during the

dividing resistors floating, an internal zener diode is

implemented in BNO pin. Fig. 19 shows the sinking

capability of the zener diode. To protect BNO pin, the

current flowing in BNO pin must be below 1.5

μA, as shown

in Fig. 21.

VBNO

Fig. 21

VBNO vs. IBNO

3. 0

3.5

4. 0

4. 5

5.0

5.5

125

°C

-40

°C

Pull-Low Resistor on the Gate Pin of MOSFET

An anti-floating resistor is implemented in the OUT pin to

prevent any uncertain output, which may cause MOSFET

working abnormally or false triggering-on.

However, such

design won’t cover the conditions of disconnection of gate

resistor RG. It is still strongly recommended to have a

resistor connected at the MOSFET gate terminal (as shown

in figure 22) to provide extra protection for fault conditions.

This external pull-low resistor is to prevent the MOSFET

from being damaged during power-on when the gate

resistor is disconnected.

In such a single-fault condition,

as shown in figure 23, the resistor R8 can provide a

discharge

path

avoid

the

MOSFET

from

being

false-triggered by the coupling through the gate-to-drain

capacitor CGD. Therefore, the gate of MOSFET should be

pulled low to maintain MOSFET in a off-state no matter the

gate resistor is disconnected or opened in any case.

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