GTL2004 datasheet(2/10 Pages) PHILIPS

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Philips Semiconductors

Product specification

GTL2004

Quad GTL/GTL+ to LVTTL/TTL

bidirectional latched translator

1999 Jul 19

853–2165 21984

FEATURES

• Operates as a quad GTL/GTL+ sampling receiver or as a

LVTTL/TTL to GTL/GTL+ driver

• Quad bidirectional bus interface

• Separate latch enable for each bit

• Live insertion/extraction permitted

• B outputs include 30Ω series resistance

• Latch-up protection exceeds 500mA per JEDEC Std 17

• ESD protection exceeds 2000V per JEDEC Std

DESCRIPTION

The GTL2004 is a quad translating transceiver designed for 3.3V

system interface with a GTL/GTL+ bus.

The direction pin allows the part to function as either a GTL to TTL

sampling receiver or as a TTL to GTL interface. Separate latch

enables allow sampling and holding of data from the GTL bus.

PIN CONFIGURATION

LE3

GTLREF

DIR

VCC

GND

LE2

LE1

LE0

SW00318

PIN DESCRIPTION

PIN NUMBER

SYMBOL

NAME AND FUNCTION

DIR

Direction control input

1, 3, 5, 7

A0 – A3

Data inputs/outputs (A side, GTL)

11, 12, 13, 14

B0 – B3

Data inputs/outputs (B side, TTL)

2, 4, 6, 9

LE0 – LE3

Latch enables

GTLREF

GTL reference voltage

GND

Ground (0V)

VCC

Positive supply voltage

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

SYMBOL

PARAMETER

Tamb = 25°C

B to A

A to B

UNIT

tPLH

tPHL

Propagation delay

An to Bn or Bn to An

CL = 50pF; VCC = 3.3V

2.0

1.8

4.4

4.7

CIN

Input capacitance DIR, LEn

VI = 0V or VCC

3.0

CI/O

I/O pin capacitance

Outputs disabled; VI/O = 0V or 3.152V

7.2

4.6

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

DWG NUMBER

16-Pin Plastic TSSOP Type II

–40

°C to +85°C

GTL2004 PW DH

SOT403-1

GTL2004 Datasheet(PDF) 2 Page - NXP Semiconductors

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