LTM4686B datasheet(86/132 Pages) AD

86 / 132 page

LTM4683

Rev. 0

For more information www.analog.com

PMBus COMMAND DETAILS

A ShortCycle event occurs whenever the PWM channel is commanded back On or reactivated, after the part has been

commanded Off and is processing either the TOFF_DELAY or the TOFF_FALL states. The PWM channel can be turned

On/Off through the RUN pin or the PMBus OPERATION command.

If the PWM channel is reactivated during the TOFF_DELAY, the part will perform the following:

1. Immediately tri-state the PWM channel output.

2. Start the retry delay timer as specified by the tOFF(MIN).

3. After the tOFF(MIN) value has expired, the PWM channel will proceed to the TON_DELAY state and the STATUS_

MFR_SPECIFIC bit #1 will assert.

If the PWM channel is reactivated during the TOFF_FALL, the part will perform the following:

1. Stop ramping down the PWM channel output.

2. Immediately tri-state the PWM channel output.

3. Start the retry delay timer as specified by the tOFF(MIN).

4. After the tOFF(MIN) value has expired, the PWM channel will proceed to the TON_DELAY state, and the STATUS_

MFR_SPEFIFIC bit #1 will assert.

If the ShortCycle event occurs and the ShortCycle MFR_CHAN_CONFIG bit is not set, the PWM channel state machine

will complete its TOFF_DELAY and TOFF_FALL operations as previously commanded by the user.

MFR_CONFIG_ALL

General-purpose configuration command common to multiple ADI products.

BIT MEANING

Enable fault logging

Ignore resistor configuration pins

Mask PMBus, Part II, Section 10.9.1 Violations

Disable SYNC output

Enable 255ms PMBus timeout

A valid PEC is required for PMBus writes to be accepted. If this bit is not

set, the part will accept commands with invalid PEC.

Enable the use of PMBus clock stretching

Execute CLEAR_FAULTS on the rising edge of either RUN pin

This command has one data byte.

ON/OFF/MARGIN

COMMAND NAME

CMD

CODE

DESCRIPTION

TYPE

PAGED

DATA

FORMAT UNITS NVM

DEFAULT

VALUE

ON_OFF_CONFIG

0x02

RUN pin and PMBus bus on/off command configuration. R/W Byte

Reg

0x1E

OPERATION

0x01

Operating mode control. On/off, margin high, and

margin low.

R/W Byte

Reg

0x80

MFR_RESET

0xFD

Commanded reset without requiring a power-down.

Send Byte

LTM4686B Datasheet(PDF) 86 Page - Analog Devices

LTM4686B Datasheet(HTML) 86 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL