5.7 Electrical Characteristics (continued)

For VS = (V+) – (V–) = 1.5V to 5.5V (±0.75V to ±2.75V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and

VO UT = VS / 2, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SHUTDOWN

IQ_SHDN

Shutdown current per

amplifier

All amplifiers disabled, SHDN = V–, OPA310S-Q1

0.265

0.475

µA

IQ_SHDN

Shutdown current per

amplifier (1)

All amplifiers disabled, SHDN = V–, TA = –40℃ to 85℃, OPA310S-Q1

0.700

µA

ZOUT_SHDN

Output impedance

during shutdown

Amplifier disabled

43 || 11.5

GΩ ||pF

VSHDN_IH

Logic high threshold

voltage (amplifier

enabled)

(V–) + 1.2

V

VSHDN_IL

Logic low threshold

voltage (amplifier

disabled)

(V–) + 0.2

V

tON

Amplifier enable time

(full shutdown) (7) (1)

G = +1, VCM = VS / 2, VO = 0.9 × VS / 2, RL connected to V–

1

1.6

µs

tOFF

Amplifier disable time

(7)

G = +1, VCM = VS / 2, VO = 0.1 × VS / 2, RL connected to V–

1

µs

IB_SHDN

SHDN pin input bias

current (per pin)

(V+) ≥ SHDN ≥ (V–) + 1 V

50

nA

(V–) ≤ SHDN ≤ (V–) + 0.2V

100

(1)

Max data is specified based on characterization results.

(2)

Min data is specified based on characterization results.

(3)

Typical input current noise data is specified based on design simulation results.

(4)

Third-order filter; bandwidth = 80kHz at –3dB.

(5)

Short circuit current specified here is the average of sourcing and sinking short circuit currents.

(6)

AOL is measured as the difference between (VOSA – VOSB) / (VOUTA – VOUTB). VOSA is the offset measured when the OUT pin is biased

at (V+) - 0.25V while the device sources 50mA and VOSB is the offset measured when the OUT pin is biased at (V–) + 0.25V while the

device sinks 50mA.

(7)

Disable time (tOFF) and enable time (tON) are defined as the time interval between the 50% point of the signal applied to the SHDN pin

and the point at which the output voltage reaches the 10% (disable) or 90% (enable) level.

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OPA310-Q1

SBOSAI0 – DECEMBER 2023

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