AT83SND2CMP3 datasheet(24/97 Pages) ATMEL

Part #	AT83SND2CMP3

Description	Single-Chip MP3 Decoder with Full Audio Interface

PDF	97 Pages

Scroll/Zoom	100%

Manufacturer	ATMEL [ATMEL Corporation]

Direct Link	http://www.atmel.com

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24 / 97 page

AT83SND2CMP3

7524B–MP3–05/06

Figure 24. Serial Audio Interface

Protocol is as following to access DAC registers:

Figure 25. Dac SPI Interface

DAC Interface SPI Protocol

On AUDCDIN, the first bit is a read/write bit. 0 indicates a write operation while 1 is for a

read operation. The 7 following bits are used for the register address and the 8 last ones

are the write data. For both address and data, the most significant bit is the first one.

In case of a read operation, AUDCDOUT provides the contents of the read register,

MSB first.

The transfer is enabled by the AUDCCS signal active low. The interface is resetted at

every rising edge of AUDCCS in order to come back to an idle state, even if the transfer

does not succeed. The DAC Interface SPI is synchronized with the serial clock AUDC-

Audio

DAC

AUDCDIN

AUDCCLK

AUDCCS

AUDCDOUT

rw a6 a5 a4 a3 a2 a1

d7 d6 d5

d7 d6 d5 d4

d1 d0

AUDCDOUT

AUDCDIN

AUDCCLK

AUDCCS

AT83SND2CMP3 Datasheet(PDF) 24 Page - ATMEL Corporation