DSP56364P datasheet(2/148 Pages) FREESCALE

2 / 148 page

Overview

DSP56364 Technical Data, Rev. 4.1

1-2

Freescale Semiconductor

Figure 1-1 DSP56364 Block Diagram

Data Sheet Conventions

This data sheet uses the following conventions:

OVERBAR

Used to indicate a signal that is active when pulled low (For example, the RESET pin is active

when low.)

“asserted”

Means that a high true (active high) signal is high or that a low true (active low) signal is low

“deasserted”

Means that a high true (active high) signal is low or that a low true (active low) signal is high

Examples:

Signal/Symbol

Logic State

Signal State

Voltage*

True

Asserted

VIL / VOL

False

Deasserted

VIH / VOH

True

Asserted

VIH / VOH

False

Deasserted

VIL / VOL

Note: *Values for VIL, VOL, VIH, and VOH are defined by individual product specifications.

CLOCK

GEN

INTERNAL

DATA BUS

SWITCH

EXTAL

PROGRAM RAM

0.5K x 24

PROGRAM ROM

8K x 24

Bootstrap ROM

192 x 24

PROGRAM

INTERRUPT

CONT

PROGRAM

DECODE

CONT

PROGRAM

ADDRESS

GEN

YAB

XAB

PAB

YDB

XDB

PDB

GDB

MODA/IRQA

MODB/IRQB

DATA ALU

24 X 24+56

→56-BIT MAC

TWO 56-BIT

ACCUMULATORS

BARREL SHIFTER

MODD/IRQD

PLL

ADDRESS

GENERATION UNIT

OnCE™

DSP56300

GPIO

ESAI

24-BIT

MEMORY

RAM

1K X 24

MEMORY

RAM

1.5K X 24

DDB

DAB

SIX CHANNELS

DMA UNIT

CORE

24 BITS BUS

SHI

JTAG

RESET

POWER

MGMT

PINIT/NMI

DRAM & SRAM

BUS

INTERFACE

EXTERNAL

ADDRESS

BUS

SWITCH

EXTERNAL

DATA BUS

SWITCH

ADDRESS

DATA

CONTROL

PERIPHERAL

EXPANSION

AREA

MEMORY

EXPANSION

AREA

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