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XRT86VL32IB Datasheet(PDF) 32 Page - Exar Corporation |
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XRT86VL32IB Datasheet(HTML) 32 Page - Exar Corporation |
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32 / 65 page ![]() XRT86VL32 29 DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION REV. V1.2.0 T1MCLKnOUT B4 O 12 LIU T1 Output Clock Reference This output pin is defaulted to 1.544MHz, but can be programmed to output 3.088MHz, 6.176MHz, or 12.352MHz in register 0x0FE4. E1OSCCLK P2 O 8 Framer E1 Output Clock Reference This output pin is defaulted to 2.048MHz, but can be programmed to 65.536MHz in register 0x011E. T1OSCCLK P4 O 8 Framer T1 Output Clock Reference This output pin is defaulted to 1.544MHz, but can be programmed to output 49.408MHz in register 0x011E. 8KSYNC R2 O 8 8kHz Clock Output Reference This pin is an output reference of 8kHz based on the MCLKIN input. Therefore, the duty cycle of this output is determined by the time period of the input clock reference. 8KEXTOSC N4 I - External Oscillator Select For normal operation, this pin should not be used, or pulled “Low”. This pin is internally pulled “Low” with a 50k Ω resistor. ANALOG E5 O Factory Test Mode Pin NOTE: For Internal Use Only LOP N2 I - Loss of Power for E1 Only This is a Loss of Power pin in the E1 application only. Upon detecting LOP in E1 mode, the device will automatically transmit the Sa5 and Sa6 bit to a different pattern, so that the Receive ter- minal can detect a power failure in the network. Please see register 0xn131 for the Transmit SA control. TIMING INTERFACE SIGNAL NAME BALL #TYPE OUTPUT DRIVE (MA) DESCRIPTION |
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