SAA7221HSSLASHC1 datasheet(13/28 Pages) PHILIPS

13 / 28 page

2000 Jan 31

Philips Semiconductors

Preliminary speciﬁcation

Integrated MPEG AVGD decoders

SAA7215; SAA7216; SAA7221

AV_DATA(7)

162

MPEG stream port input (bit 7); note 2

ERROR

163

ﬂag for bitstream error; note 2

A_STROBE

164

audio data strobe for AV_DATA and A_DATA inputs; note 2

V_STROBE

165

video data strobe for AV_DATA and A_DATA inputs; note 2

VSS (gate input)

166

ground for pad ring

CPU_SEL(0)

167

CPU data interface selection (0) input; note 2; note 3

CLK

168

27 or 40.5 MHz clock input; note 2

VSS

169

ground for pad ring

SIZ(1)

170

size of data on bus DATA (1) input; note 2

SIZ(0)

171

size of data on bus DATA (0) input; note 2

ADDRESS(20)

172

CPU address input (bit 20); note 2

ADDRESS(19)

173

CPU address input (bit 19); note 2

ADDRESS(18)

174

CPU address input (bit 18); note 2

ADDRESS(17)

175

CPU address input (bit 17); note 2

ADDRESS(16)

176

CPU address input (bit 16); note 2

ADDRESS(15)

177

CPU address input (bit 15); note 2

ADDRESS(14)

178

CPU address input (bit 14); note 2

ADDRESS(13)

179

CPU address input (bit 13); note 2

ADDRESS(12)

180

CPU address input (bit 12); note 2

ADDRESS(11)

181

CPU address input (bit 11); note 2

VSS(CO)

182

ground for core logic

VDD(CO)

183

supply voltage for digital core logic

VDD

184

supply voltage for pad ring

ADDRESS(10)

185

CPU address input (bit 10); note 2

ADDRESS(9)

186

CPU address input (bit 9); note 2

ADDRESS(8)

187

CPU address input (bit 8); note 2

ADDRESS(7)

188

CPU address input (bit 7); note 2

ADDRESS(6)

189

CPU address input (bit 6); note 2

ADDRESS(5)

190

CPU address input (bit 5); note 2

ADDRESS(4)

191

CPU address input (bit 4); note 2

ADDRESS(3)

192

CPU address input (bit 3); note 2

ADDRESS(2)

193

CPU address input (bit 2); note 2

ADDRESS(1)

194

CPU address input (bit 1); note 2

ADDRESS(0)

195

CPU address input (bit 0); note 2

R/W

196

read or write input; note 2

DMA_RDY

197

O/Z

DMA ready output; note 2

DMA_DONE

198

DMA end input; note 2

DMA_REQ

199

I/O

DMA request input or output; note 2

DMA_ACK

200

DMA acknowledge input; note 2

CSRG

201

chip select for control register access input; note 2

CSSD/ADDRESS(21)

202

chip select for SDRAM access or CPU address (bit 21) input; note 2

SYMBOL

TYPE(1)

DESCRIPTION

SAA7221HS/C1 Datasheet(PDF) 13 Page - NXP Semiconductors

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