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SZF2002 Datasheet(PDF) 57 Page - NXP Semiconductors |
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SZF2002 Datasheet(HTML) 57 Page - NXP Semiconductors |
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57 / 76 page ![]() 1998 Aug 26 57 Philips Semiconductors Product specification Low voltage 8-bit microcontroller with 6-kbyte embedded RAM SZF2002 23 INSTRUCTION SET The SZF2002 uses a powerful instruction set which optimizes byte efficiency and execution speed. Assigned opcodes add new high-power operation and permit new addressing modes. The instruction set consists of 49 single-byte, 46 two-byte and 16 three-byte instructions. When using a 12 MHz clock, 64 instructions execute in 0.5 µs and 45 instructions execute in 1 µs. Multiply and divide instructions execute in 2 µs. For the description of the Data Addressing modes and Hexadecimal opcode cross-reference see Table 54. Table 50 Instruction set description: Arithmetic operations MNEMONIC DESCRIPTION BYTES CYCLES OPCODE (HEX) Arithmetic operations ADD A,Rr add register to A 1 1 2* ADD A,direct add direct byte to A 2 1 25 ADD A,@Ri add indirect RAM to A 1 1 26 and 27 ADD A,#data add immediate data to A 2 1 24 ADDC A,Rr add register to A with carry flag 1 1 3* ADDC A,direct add direct byte to A with carry flag 2 1 35 ADDC A,@Ri add indirect RAM to A with carry flag 1 1 36 and 37 ADDC A,#data add immediate data to A with carry flag 2 1 34 SUBB A,Rr subtract register from A with borrow 1 1 9* SUBB A,direct subtract direct byte from A with borrow 2 1 95 SUBB A,@Ri subtract indirect RAM from A with borrow 1 1 96 and 97 SUBB A,#data subtract immediate data from A with borrow 2 1 94 INC A increment A 1 1 04 INC Rr increment register 1 1 0* INC direct increment direct byte 2 1 05 INC @Ri increment indirect RAM 1 1 06 and 07 DEC A decrement A 1 1 14 DEC Rr decrement register 1 1 1* DEC direct decrement direct byte 2 1 15 DEC @Ri decrement indirect RAM 1 1 16 and 17 INC DPTR increment data pointer 1 2 A3 MUL AB multiply A and B 1 4 A4 DIV AB divide A by B 1 4 84 DA A decimal adjust A 1 1 D4 |
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