Preliminary Data Sheet

AD9088

GENERAL DESCRIPTION

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Rev. PrA | 2 of 3

The Apollo mixed signal front-end (MxFE

®) is a highly integrated

device with a 16-bit, 16 GSPS maximum sample rate, RF digital-to-

analog converter (DAC) core, and 12-bit, 8 GSPS maximum sam-

ple rate, RF analog-to-digital converter (ADC) core. The AD9088

supports eight transmit channels and eight receive channels. The

AD9088 is well suited for applications requiring both wideband

ADCs and DACs to process signal(s) having wide instantaneous

bandwidth. The device features a 48 lane, 32.5 Gbps JESD204C

or 20 Gbps JESD204B data transceiver port, an on-chip clock

multiplier, and a digital signal processing (DSP) capability target-

ed at either wideband or multi-band, direct to RF applications.

The AD9088 also features a bypass mode that allows the full

bandwidth capability of the ADC and/or DAC cores to bypass the

DSP datapaths. The device also features low latency loopback and

frequency hopping modes targeted at phased array radar systems

and electronic warfare applications.

The AD9088 is available in a 24mm x 26mm, 899-ball BGA and

operates within the –40°C to +110°C junction temperature range.

For additional information, contact ApolloSupport@analog.com.

Table 1. Product Listing with Distinguishing Features

Part No.

Tx

Rx

Digital Features

DAC

Ch

Max

DAC

Rate

(GSPS)

Analog

BW1

(GHz)

Max

Tx

iBW

(GHz)

ADC

Ch

Max

ADC

Rate

(GSPS)

Analog

BW2

(GHz)

Max Rx

iBW

(GHz)

Input

Network FSRC

Rx to

Tx

Loop

back

Fast

Freq

Hopping

PFILT/

CFIR

Dynamic

Config

(PFILT CFIR,

DDC/DUC)

Spectrum

Sniffer

AD9084–DF

4

28

18

14

4

20

18

10

DIFF

Yes

Yes

Yes

Yes

Yes

Yes

AD9084–SE

4

28

18

14

4

14

16

7

SE

Yes

Yes

Yes

Yes

Yes

Yes

AD9088

8

16

183.

8

8

8

16

4

SE

No

Yes

Yes

Yes

Yes

Yes

1 Analog bandwidth is the allowed frequency range supported by the DAC output port. It may be limited by the maximum DAC sampling rate due to sinc roll-off, return loss of

the PCB layout, and balun response. Check detailed specifications for operating at higher frequencies.

2 Analog BW represents the −3 dB point relative to the input power level near DC. Limited by the on-chip balun response and the return loss of the PCB layout. Check

detailed specifications for operating at higher frequencies.

3 Actual output power level is limited by the maximum DAC sampling rate in the adjacent column due to sinc roll-off