LTM4686B datasheet(21/130 Pages) AD

21 / 130 page

LTM4682

Rev. 0

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VIN_VBIAS (N9): Input pin to the internal step down regula-

tor that produces 5.5V (VBIAS pin) to power both internal

controllers to reduce power dissipation after power up.

Each internal controller has an INTVCC_01 or INTVCC_23

regulator that is powered from SVIN_01 or SVIN_23. To

eliminate this power loss through these linear regulators,

the VBIAS powers both at very high efficiency.

VBIAS (N10): A 5.5V step down output that powers both

internal controllers to reduce power loss. It provides

a 22µF ceramic bypass capacitor on this pin to GND.

SVIN_01 and SVIN_23 must be higher than 7V for this

VBIAS to supply the controllers. When the input voltage

is between 4.5V to 5.75V, pull the RUNP pin to GND, and

connect SVIN_01 and SVIN_23 to INTVCC_01 and INTVCC_23,

respectively. Powering up the VBIAS regulator with the

SVIN_01 and SVIN_23 greater than 7V will power the

INTVCC_01, INTVCC_02, the VDD33_01, VDD33_23, VDD25_01,

and VDD25_23 from VBIAS. Otherwise, these sources will

get their power from SVIN_01 and SVIN_23. This will allow

the programming each internal controller’s EEPROM with

the power regulator channels in the off position.

RUNP (N11): This pin enables the Internal 5.5V VBIAS step

down regulator. Pulling this pin above 0.85V will enable

the Internal regulator. The pin is rated to VIN, so connect

to VIN to enable, and connect to GND to disable. When the

input voltage is between 4.5V to 5.75V, pull the RUNP pin

to GND, and connect SVIN_01 and SVIN_23 to INTVCC_01

and INTVCC_23, respectively.

VOUT2 (N13-N15, P13-P15, R13-R15, T13-T15, U13-

U15): Channel 2 Output Voltage. Place the recommended

output capacitors from this shape to GND. See the Layout

Checklist/Example section.

SW2 (P1-P2, R1-R2, T1-T2): Switching Node of Channel 2

Step-Down Converter Stage. Used for test purposes or

EMI-snubbing. It may be routed a short distance to a

local test point to monitor switching action of Channel 2,

if desired, but do not route near any sensitive signals.

Otherwise, leave it open.

VOSNS2+ (P8): Channel 2 Positive Differential Voltage

Sense Input. Together, VOSNS2+ and VOSNS2– serve to

Kelvin-sense the VOUT2 output voltage at VOUT2’s POL and

provide the differential feedback signal directly to Channel

2’s feedback loop. Command VOUT2’s target regulation

voltage by serial bus. Its initial command value at SVIN_23

power-up is dictated by NVM contents (factory default:

0.75V)—or, optionally, may be set by configuration resis-

tors; see VOUT2_CFG, VTRIM2_CFG and the Applications

Information section.

IIN_23– (P9): Negative Current Sense Amplifier Input. If

the input current sense amplifier is not used, this pin

must be shorted to the IIN_23+ and SVIN_23 pin. See the

Applications Information section for more details about

the input current sensing.

INTVCC_23 (P10): Internal Regulator, 5.5V Output. When

operating the LTM4682 from 5.75V ≤ SVIN_23 ≤ 16V, an

internal LDO generates INTVCC_23 from SVIN_23 to bias

internal control circuits and the MOSFET drivers of the

LTM4682’s Channels 2 and 3. An external 4.7µF ceramic

decoupling i capacitor s required. INTVCC_23 is on regu-

lated regardless of the RUNn pin state. When operating

the LTM4682 with 4.5V ≤ SVIN_23 < 5.75V, INTVCC_23

must be electrically shorted to SVIN_23, and the RUNP

pin must be pulled to GND. VBIAS takes over after startup

when the input voltage is greater than 7V.

SVIN_23 (P11): Input Supply for LTM4682’s Internal

Control IC for Channels 2 and 3. In most applications,

SVIN_23 connects to VIN_23. SVIN_23 can be operated

from an auxiliary supply separate from VIN23 for power-

ing the VIN23 from a lower supply like 6V. The SVIN_23

pin requires 1Ω and 1µF decoupling capacitor to measure

the actual control chip current. The 1Ω resistor is used

to measure the actual control chip current. See MFR_

READ_ICHIP and MFR_ADC_CONTROL COMMAND sec-

tion. When operating from 4.5V to 5.75V with no auxiliary

bias supply, then the main input supply should connect to

SVIN_23 and INTVCC_23. See Test Circuit 2 for an example.

In this configuration, the ICHIP current will not be relevant

since INTVCC_23 is connected to SVIN_23.

PIN FUNCTIONS

LTM4686B Datasheet(PDF) 21 Page - Analog Devices

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