M65KA512AB datasheet(1/55 Pages) STMICROELECTRONICS

Part #	M65KA512AB

Description	512Mbit (4 Banks x 8M x 16), 133 MHz Clock Rate, Bare Die, 1.8 V Supply, Low Power SDRAM

PDF	55 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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1 / 55 page

March 2007

Rev 3

1/55

1

M65KA512AB

512Mbit (4 Banks x 8M x 16), 133 MHz Clock Rate,

Bare Die, 1.8 V Supply, Low Power SDRAM

Features

■

512 Mbit Synchronous Dynamic Ram

– Organized as 4 Banks of 8 Mwords, each

16 bits wide

■

Supply voltage

–VDD = 1.7 to 1.9 V (1.8 V typical in

accordance with JEDEC standard)

–VDDQ = 1.7 to 1.9 V for Input/Output

■

Synchronous Burst Read and Write

– Fixed Burst Lengths: 1, 2, 4, 8 words or Full

Page

– Burst Types: Sequential and Interleaved.

– Clock Frequency: 133 MHz (7.5 ns speed

class)

– Clock Valid to Output Delay (CAS Latency):

3 at 133 MHz

– Burst Control by Burst Terminate and

Precharge Command

■

Automatic and controlled Precharge

■

Byte control by LDQM and UDQM

■

Low-power features:

– Partial Array Self Refresh (PASR),

– Automatic Temperature Compensated Self

Refresh (TCSR)

– Driver Strength (DS)

– Deep Power-Down Mode

■

Auto Refresh and Self Refresh

■

LVCMOS Interface compatible with

multiplexed addressing

■

Operating temperature range

–

− 30to 85 °C

M65KA512AB is only available as part of a multiple memory product

Wafer

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