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TDA4841PS Datasheet(PDF) 15 Page - NXP Semiconductors

Part # TDA4841PS
Description  I2C-bus autosync deflection controller for PC monitors
PDF  60 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA4841PS Datasheet(HTML) 15 Page - NXP Semiconductors

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1999 Oct 25
15
Philips Semiconductors
Product specification
I2C-bus autosync deflection controller for
PC monitors
TDA4841PS
CHARACTERISTICS
VCC = 12 V; Tamb =25 °C; peripheral components in accordance with Fig.1; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Horizontal sync separator
INPUT CHARACTERISTICS FOR DC-COUPLED TTL SIGNALS: PIN HSYNC
Vi(HSYNC)
sync input signal voltage
1.7
−−
V
VHSYNC(sl)
slicing voltage level
1.2
1.4
1.6
V
tr(HSYNC)
rise time of sync pulse
10
−
500
ns
tf(HSYNC)
fall time of sync pulse
10
−
500
ns
tW(HSYNC)(min)
minimum width of sync pulse
0.7
−−µs
Ii(HSYNC)
input current
Vi(HSYNC) = 0.8 V
−−−200
µA
Vi(HSYNC) = 5.5 V
−−
10
µA
INPUT CHARACTERISTICS FOR AC-COUPLED VIDEO SIGNALS (SYNC-ON-VIDEO, NEGATIVE SYNC POLARITY)
VHSYNC
sync amplitude of video input
signal voltage
Rsource =50 Ω−
300
−
mV
VHSYNC(AC,sl)
slicing voltage level
(measured from top sync)
Rsource =50 Ω
90
120
150
mV
Vclamp(HSYNC)
top sync clamping voltage level
Rsource =50 Ω
1.1
1.28
1.5
V
Ich(HSYNC)
charge current for coupling
capacitor
Vi(HSYNC) >Vclamp(HSYNC)
1.7
2.4
3.4
µA
tW(HSYNC)(min)
minimum width of sync pulse
0.7
−−µs
Rsource(max)
maximum source resistance
duty cycle = 7%
−−
1500
Ω
Ri(diff)(HSYNC)
differential input resistance
during sync
−
80
−Ω
Automatic polarity correction for horizontal sync
horizontal sync pulse width
related to tH
−−
25
%
td(HPOL)
delay time for changing polarity
0.3
−
1.8
ms
Vertical sync integrator
tint(V)
integration time for generation
of a vertical trigger pulse
fH = 15.625 kHz;
IHREF = 0.52 mA
14
20
26
µs
fH = 31.45 kHz;
IHREF = 1.052 mA
710
13
µs
fH = 64 kHz;
IHREF = 2.141 mA
3.9
5.7
6.5
µs
fH = 100 kHz;
IHREF = 3.345 mA
2.5
3.8
4.5
µs
Vertical sync slicer (DC-coupled, TTL compatible): pin VSYNC
Vi(VSYNC)
sync input signal voltage
1.7
−−
V
VVSYNC(sl)
slicing voltage level
1.2
1.4
1.6
V
Ii(VSYNC)
input current
0V<Vi(VSYNC) < 5.5 V
−−±10
µA
t
P(H)
t
H
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