TDA8501 datasheet(18/30 Pages) PHILIPS

18 / 30 page

April 1993

Philips Semiconductors

Preliminary speciﬁcation

PAL/NTSC encoder

TDA8501

CVBS output (pin 16)

Isink

maximum sink current

650

−−

µA

Isource

maximum source current

1000

−−

µA

DC voltage level

Y +SYNC = 0

−

1.6

−

Y +SYNC gain;

from pin 20 to pin 16

−

chrominance difference;

from pin 14 to pin 16

−

Gø

differential phase

note 3

−−

degrees

differential gain

note 4

−−

3dB

output resistance

−

120

−Ω

Oscillator output (pin 23)

OSC

series-resonance

the resonance resistance of the crystal should be

< 60 Ω and the

parallel capacitance of the crystal should be

< 10 pF.

Filter tuning loop (pin 15)

VDC

DC control voltage level NTSC

−

0.83

−

VDC

DC control voltage level PAL

−

0.88

−

VDCL

limited DC-level LOW

IO = 200 µA

−

0.27

−

VDCH

limited DC-level HIGH

II = 200 µA

−

1.8

−

H2 (pin 4)

VIL

LOW level input voltage

inactive

−

VIH

HIGH level input voltage

active

−

current for forcing HIGH

220

−−

µA

current for forcing LOW

260

−−

µA

voltage out LOW

−−< 0.5

voltage out HIGH

−−

Isink

maximum sink current

−−

µA

Isource

maximum source current

−−

µA

Composite sync input (pin 24)

VSYNC

SYNC pulse amplitude

300

600

mV (p-p)

slicing level

−

input current

−

−µA

maximum output current during

SYNC

−

100

−µA

BURST ADJ (pin 21; note 5)

DC voltage level

−

VREF

(V13)

−

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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