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TDA8787 Datasheet(PDF) 8 Page - NXP Semiconductors |
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TDA8787 Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 20 page ![]() 1998 Oct 15 8 Philips Semiconductors Preliminary specification 10-bit, 3.0 V analog-to-digital interface for CCD cameras TDA8787 Correlated Double Sampling (CDS) Vi(CDS)(p-p) maximum peak-to-peak CDS input amplitude (video signal) VCC = 2.85 V 650 −− mV VCC ≥ 3.0 V 800 −− mV Vreset(max) maximum CDS input reset pulse amplitude 500 −− mV Ii(IN) input current into pin IN (pin 4) at floating gate level −1 − +1 µA tCDS(min) CDS control pulses minimum active time video input = Vi(CDS)(p-p); 2 LSB error at ADC output 11 15 − ns th(IN-SHP) CDS input hold time (pin IN) compared to control pulse SHP VCCA =VCCD =30V; Tamb =25 °C; see Fig.9 35 7 ns th(IN-SHD) CDS input hold time (pin IN) compared to control pulse SHD VCCA =VCCD =30V; Tamb =25 °C; see Fig.9 35 7 ns Amplifier DRAGC AGC dynamic range − 36 − dB ∆G AGC maximum AGC gain step −0.3 − +0.3 dB Analog-to-Digital Converter (ADC) LEi integral linearity error fpix = 18 MHz; ramp input −±1.3 ±2.5 LSB LEd differential linearity error fpix = 18 MHz; ramp input −±0.5 ±0.9 LSB Total chain characteristics (CDS + AGC + ADC) fpix(max) maximum pixel frequency 18 −− MHz tCLKH CLK pulse width HIGH 15 −− ns tCLKL CLK pulse width LOW 15 −− ns td(SHD-CLK) time delay between SHD and CLK see Fig.9 10 −− ns tsu(PBK-CLK) set-up time of PBK compared to CLK 10 −− ns Vi(IN) video input dynamic signal for ADC full-scale output AGC code = 00 800 −− mV AGC code = 383 12.7 −− mV Ntot(rms) total output noise (RMS value) see Fig.8 AGC gain=0dB − 0.25 − LSB AGC gain=9dB − 0.8 − LSB OCCD(max) maximum offset between CCD floating level and CCD dark pixel level −70 − +70 mV Vn(i)(eq)(rms) equivalent input noise voltage (RMS value) − 110 −µV SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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