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TDA9143 Datasheet(PDF) 22 Page - NXP Semiconductors

Part # TDA9143
Description  I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor
PDF  40 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9143 Datasheet(HTML) 22 Page - NXP Semiconductors

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1996 Jan 17
22
Philips Semiconductors
Preliminary specification
I2C-bus controlled, alignment-free
PAL/NTSC/SECAM decoder/sync processor
TDA9143
Vo
DC output voltage level
−
2.5
−
V
td
delay between negative edge of LLC
and positive edge of HA pulse
CL = 15 pF
102040ns
Vertical section
VERTICAL OSCILLATOR
ffr
free running frequency
FORF = 1; divider ratio 628
−
50
−
Hz
FORF = 0; divider ratio 528
−
60
−
Hz
fLR
frequency locking range
43
−
64
Hz
LR
divider locking range
488
625
722
VA OUTPUT (PIN 11); ECL = 0
VOH
HIGH level output voltage
4.0
5
5.5
V
VOL
LOW level output voltage
−
0.2
0.4
V
Isink
sink current
2
−−
mA
Isource
source current
2
−−
mA
tW(VA)
VA pulse width
2.5/fH
50 Hz standard
−
160
−µs
3/fH
60 Hz standard
−
192
−µs
td
delay between start of vertical sync
pulse and positive edge of VA
note 4; see Fig.7
−
35
−µs
Zo
output impedance
ECL = 1
3
−−
M
Ω
Sandcastle output (pin 10)
Vo
zero level output voltage
0
0.5
1
V
Isink
sink current
0.5
0.7
0.9
mA
HORIZONTAL AND VERTICAL BLANKING
Vbl
blanking voltage level
2.2
2.5
2.8
V
Isource
source current
0.5
0.7
0.9
mA
Iext
external current required to force the
output to the blanking level
1.0
−
3.0
mA
tW(H)
horizontal blanking pulse width
69 LLC pulses
−
10.0
−µs
td
delay between start of horizontal
blanking and start of clamping pulse
44 LLC pulses
−
6.4
−µs
CLAMPING PULSE
Vclamp
clamping voltage level
4.2
4.5
4.8
V
Isource
source current
0.5
0.7
0.9
mA
tW(clamp)
clamping pulse width
25 LLC pulses
−
3.6
−µs
td
delay between middle sync of input
and start of clamping pulse
note 3
3.0
3.2
3.4
µs
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT



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