TDA9321 datasheet(15/44 Pages) PHILIPS

15 / 44 page

1998 Dec 16

Philips Semiconductors

Preliminary speciﬁcation

I2C-bus controlled TV input processor

TDA9321H

Table 35 IF sensitivity

Table 36 Search tuning mode

IFS

IF SENSITIVITY

normal

reduced

STM

MODE

normal operation

reduced sensitivity of video ident circuit

Table 37 Video mute

Table 38 PLL demodulator frequency shift

VSW

STATE

normal operation

VIF signal switched off

L’FA

MODE

normal IF frequency

frequency shift for L’ standard

Table 39 Output status bits

Note

1. X = don’t care.

FUNCTION

SUBADDRESS

(HEX)

DATA BYTE

Output status bytes

POR

X(1)

SNR

FSI

IVW

CD3

CD2

CD1

CD0

SXD

SXC

SXB

SXA

IN1

IN2

CMB

S2A

S2B

S1A

S1B

ID3

ID2

ID1

ID0

IFI

AFA

AFB

OUTPUT CONTROL BITS

Table 40 Power-on reset

Table 41 Signal-to-noise ratio of sync signal

Table 42 Field frequency indication

POR

MODE

normal

power-down

SNR

SIGNAL-TO-NOISE RATIO

S/N > 20 dB

S/N < 20 dB

FSI

FREQUENCY

050 Hz

160 Hz

Table 43 Phase 1 (

ϕ1) lock indication

Table 44 Condition vertical divider

Table 45 Crystal indication (SXA to SXD)

INDICATION

not locked

locked

IVW

STANDARD VIDEO SIGNAL

no standard video signal

standard video signal in ‘narrow window’ or

standard TV norm (525 or 625 lines)

SXA to SXD

CONDITIONS

no crystal connected

crystal connected

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