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M58LT128HSB Datasheet(PDF) 1 Page - STMicroelectronics |
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M58LT128HSB Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 110 page ![]() March 2007 Rev 1 1/110 1 M58LT128HST M58LT128HSB 128-Mbit (8 Mb ×16, Multiple Bank, Multilevel interface, Burst) 1.8 V supply, Secure Flash memories Features ■ Supply voltage –VDD = 1.7 V to 2.0 V for program, erase and read –VDDQ = 2.7 V to 3.6 V for I/O buffers –VPP = 9 V for fast program ■ Synchronous / Asynchronous Read – Synchronous Burst Read mode: 52 MHz – Asynchronous Page Read mode – Random Access: 85 ns ■ Synchronous Burst Read Suspend ■ Programming time – 2.5 µs typical Word program time using Buffer Enhanced Factory Program command ■ Memory organization – Multiple Bank memory array: 8-Mbit Banks – Parameter Blocks (top or bottom location) ■ Dual operations – program/erase in one Bank while read in others – No delay between read and write operations ■ Block protection – All blocks protected at power-up – Any combination of blocks can be protected with zero latency – Absolute Write Protection with VPP = VSS ■ Security – Software security features – 64-bit unique device number – 2112-bit user programmable OTP Cells ■ Common Flash Interface (CFI) ■ 100 000 program/erase cycles per block ■ Electronic signature – Manufacturer code: 20h – Top device codes: M58LT128HST: 88D6h – Bottom device codes M58LT128HSB: 88D7h ■ TBGA64 package – ECOPACK® compliant TBGA64 (ZA) 10 × 13 mm BGA www.st.com |
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